component
TLV62095RGTT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV62095RGTT
Texas Instruments · DC-DC Converters · VQFN-16-EP(3x3)
TLV62095RGTT from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switch node of the power stage with absolute maximum voltage -0.3 V to VIN+0.3 V. |
| 2 | SW | output | Switch node of the power stage with absolute maximum voltage -0.3 V to VIN+0.3 V. |
| 3 | DEF | input | Internal logic control pin requiring pull-up to AVIN, absolute maximum voltage -0.3 V to 7 V. |
| 4 | PG | tri_state | Open-drain power good output pin with maximum sink current 1.0 mA. |
| 5 | FB | input | Feedback pin for output voltage regulation with absolute maximum voltage -0.3 V to 7 V. |
| 6 | AGND | power_in | Analog ground connection. |
| 7 | CP | passive | Charge pump capacitor connection point; connect 10 nF capacitor between CP and CN with voltage rating -0.3 V to VIN+7.0 V. |
| 8 | CN | passive | Charge pump capacitor connection point; connect 10 nF capacitor between CP and CN with voltage rating -0.3 V to VIN+7.0 V. |
| 9 | SS | input | Soft-start control pin with external capacitor for adjustable startup time, absolute maximum voltage -0.3 V to 7 V. |
| 10 | AVIN | power_in | Analog supply input pin with absolute maximum voltage -0.3 V to 7 V. |
| 11 | PVIN | power_in | Power supply input pin with operating voltage range 2.5 V to 5.5 V. |
| 12 | PVIN | power_in | Power supply input pin with operating voltage range 2.5 V to 5.5 V. |
| 13 | EN | input | Enable pin with internal 400 kΩ pull-down resistor; pull high to enable, absolute maximum voltage -0.3 V to 7 V. |
| 14 | PGND | power_in | Power ground connection. |
| 15 | PGND | power_in | Power ground connection. |
| 16 | VOS | input | Output voltage sense pin requiring direct connection to output with absolute maximum voltage -0.3 V to 7 V. |
| 17 | EP | power_in | Exposed thermal pad must be connected to AGND for thermal and mechanical reliability; referenced as pad 17 in board layout documentation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TLV62095RGTT - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tlv62095rgtt-etched.step/tlv62095rgtt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv62095rgtt.step/tlv62095rgtt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
afac58a9f8da8e15, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).