component
TLV62065DSGR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WSON-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV62065DSGR
Texas Instruments · DC-DC Converters · WSON-8-EP(2x2)
TLV62065DSGR from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | GND supply pin for output stage power return path; connect to PCB ground plane and star point. |
| 2 | SW | output | Switch output pin connected to internal high-side and low-side MOSFET switches; connect 0.7-1.6 µH inductor between this terminal and output capacitor. |
| 3 | AGND | power_in | Analog ground supply pin for control circuit providing 0 V reference for internal analog circuitry. |
| 4 | FB | input | Feedback input pin for internal regulation loop with 0.6 V nominal reference; connect external resistor divider to set output voltage or connect directly to output capacitor for fixed voltage mode. |
| 5 | EN | input | Active-high enable input control pin; pulling low forces device into shutdown mode with < 1 µA quiescent current and internal output capacitor discharge, pulling high enables device with 500 µs typical startup to 95% output voltage. |
| 6 | MODE | input | Mode selection input pin; high state forces fixed 3-MHz PWM mode, low state enables power-save mode with automatic transition from PFM to PWM at light load currents; must be terminated. |
| 7 | AVIN | power_in | Analog power supply input for control circuit, 2.9-5.5 V range; must connect to PVIN and input capacitor for reference voltage generation. |
| 8 | PVIN | power_in | Power supply input pin for output switching stage, 2.9-5.5 V input range with maximum overvoltage rating of 7 V and internal current source limit. |
| 9 | Thermal Pad (Exposed) | power_in | Exposed thermal pad for device ground and thermal dissipation; must be soldered to PCB ground plane with multiple vias to achieve 34.5 °C/W junction-to-board thermal resistance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TLV62065DSGR - Footprint:
Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm - 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tlv62065dsgr-etched.step/tlv62065dsgr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv62065dsgr.step/tlv62065dsgr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
09c34de58a6d952c, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).