component
TLV61225DCKR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
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| page.json | 12d ago |
| README.md | 12d ago |
| tlv61225dckr-etched.glb | 12d ago |
| tlv61225dckr-etched.step | 12d ago |
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| tlv61225dckr-hero.overlay.json | 12d ago |
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| tlv61225dckr.step | 12d ago |
TLV61225DCKR
Texas Instruments · DC-DC Converters · SC-70-6
TLV61225DCKR from Texas Instruments, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Boost converter input voltage, operating range 0.7 V to 3.3 V, with a 10-µF ceramic capacitor recommended close to VIN and GND. |
| 2 | FB | input | Output voltage sense input that must be connected directly to VOUT for the fixed 3.3-V output. |
| 3 | GND | power_in | Control, logic and power ground. |
| 4 | VOUT | power_out | Boost converter output voltage, fixed 3.3 V (3.13 V to 3.43 V), with abs max rating of 7.5 V. |
| 5 | L | passive | Connection for the inductor, placed between VIN and L (4.7 µH typical, current rating of 400 mA or higher recommended). |
| 6 | EN | input | Enable input (high enabled, low disabled) that must be actively tied high or low and not left floating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 0.7 | 3.3 | V | 4 | ||
| Maximum minimum input voltage for start-up | 0.7 | V | RLoad ≥ 150 Ω, TA = 25°C | 4 | |||
| Output voltage | VOUT | 3.13 | 3.3 | 3.43 | V | VIN < VOUT | 4 |
| Inductor current ripple | ILH | 200 | mA | 4 | |||
| Switch current limit | ISW | 160 | 400 | mA | VOUT = 3.3 V, VIN = 1.2 V | 4 | |
| Rectifying switch ON-resistance | RDSon_HSD | 1000 | mΩ | VOUT = 3.3 V | 4 | ||
| Main switch ON-resistance | RDSon_LSD | 600 | mΩ | VOUT = 3.3 V | 4 | ||
| Quiescent current into VIN | IQ | 0.5 | 1 | μA | IO = 0 mA, VEN = VIN = 1.2 V, VOUT = 3.3 V | 4 | |
| Quiescent current into VOUT | IQ | 5 | 10 | μA | IO = 0 mA, VEN = VIN = 1.2 V, VOUT = 3.3 V | 4 | |
| Shutdown current | ISD | 0.2 | 1 | μA | VEN = 0 V, VIN = 1.2 V, VOUT ≥ VIN | 4 | |
| Leakage current into VOUT | ILKG_VOUT | 1 | μA | VEN = 0 V, VIN = 1.2 V, VOUT = 3.3 V | 4 | ||
| Leakage current into L | ILKG_L | 0.01 | 0.7 | μA | VEN = 0 V, VIN = 1.2 V, VL = 1.2 V, VOUT ≥ VIN | 4 | |
| EN input current | IEN | 0.005 | 0.1 | μA | Clamped on GND or VIN (VIN < 1.5 V) | 4 | |
| Maximum EN input low voltage | VIL | 0.4 | V | VIN > 1.5 V | 4 | ||
| Minimum EN input high voltage | VIH | 1.2 | V | VIN > 1.5 V | 4 | ||
| Undervoltage lockout threshold for turnoff | VUVLO | 500 | mV | VIN decreasing | 4 | ||
| Undervoltage lockout hysteresis | 50 | mV | 4 | ||||
| Overvoltage protection threshold | 5.5 | 7.5 | V | 4 | |||
| Overtemperature protection | 140 | °C | 4 | ||||
| Overtemperature hysteresis | 20 | °C | 4 | ||||
| Voltage at VIN, L, VOUT, EN, FB | -0.3 | 7.5 | V | over operating free-air temperature range | 3 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Supply voltage at VIN | VIN | 0.7 | 3.3 | V | 3 | ||
| Operating free air temperature | TA | -40 | 85 | °C | 3 | ||
| Operating virtual junction temperature | TJ | -40 | 125 | °C | 3 | ||
| Junction-to-ambient thermal resistance | RθJA | 231.9 | °C/W | DCK (SOT), 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 55.8 | °C/W | DCK (SOT), 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 77.3 | °C/W | DCK (SOT), 6 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 0.7 | °C/W | DCK (SOT), 6 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 76.4 | °C/W | DCK (SOT), 6 pins | 4 | ||
| Power rating | 444 | mW | DCK, TA ≤ 25°C | 4 | |||
| Derating factor above TA = 25°C | 4.44 | mW/°C | DCK | 4 |
CAD (KiCad official)
- Symbol:
TLV61225DCKR - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
tlv61225dckr-etched.step/tlv61225dckr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv61225dckr.step/tlv61225dckr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
1c7b01094a4767a1, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).