component
TLV61047DDCR
Public Made by Adomby adom
Texas Instruments , SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV61047DDCR
Texas Instruments · IC · SOT-23-5
TLV61047DDCR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | passive | Switch pin of the converter, connected to the drain of the internal power MOSFET; rated -0.3V to 32V. |
| 2 | GND | power_in | Ground. |
| 3 | FB | input | Voltage feedback of output voltage, connected to the center tap of a resistor divider to program the output voltage; rated -0.3V to 6V. |
| 4 | EN | input | Enable logic input where logic high enables the device and logic low disables it into shutdown mode; rated -0.3V to 20.5V. |
| 5 | VIN | power_in | IC power supply input, operating range 2.6V to 20V and rated -0.3V to 20.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| UVLO threshold rising | VIN_UVLO | 2.42 | 2.55 | V | VIN_UVLO rising | 5 | |
| UVLO threshold falling | VIN_UVLO | 2.1 | 2.26 | V | VIN_UVLO falling | 5 | |
| Input voltage range | VIN | 2.6 | 20 | V | 5 | ||
| Quiescent current into VIN pin | IQ_VIN | 25 | 50 | µA | IC enabled, no load, no switching, VIN = 2.6V to 20V, FB=1.4V, TJ=-40°C to 125°C | 5 | |
| Shutdown current into VIN pin | ISD | 0.4 | 1.5 | µA | IC disabled, VIN = 2.6V to 20V, TJ= up to 85°C | 5 | |
| Leakage current into FB pin | IFB_LKG | 50 | nA | TJ=-40°C to 125°C | 5 | ||
| Leakage current into SW pin | ISW_LKG | 500 | nA | IC disabled, SW = 28V, TJ=-40°C to 125°C | 5 | ||
| Output voltage range | VOUT | 4.5 | 28 | V | 5 | ||
| Reference voltage at FB pin | VREF | 1.209 | 1.233 | 1.258 | V | PWM and PFM mode, TJ=-40°C to 125°C | 5 |
| Switching frequency TLV61047 | FSW | 1.2 | 1.6 | 2 | MHz | VIN = 5V, VOUT = 12V | 5 |
| Minimum on time | tON_min | 45 | 150 | ns | 5 | ||
| Peak switch current limit | ILIM_SW | 1.9 | 2.2 | 2.5 | A | VIN = 5V | 5 |
| Voltage at VIN, EN | -0.3 | 20.5 | V | 4 | |||
| Voltage at SW | -0.3 | 32 | V | 4 | |||
| Voltage at FB | -0.3 | 6 | V | 4 | |||
| Operating junction temperature range | TJ | -40 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, all pins | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged device model, all pins | 4 | |
| Input voltage range | VIN | 2.6 | 20 | V | 4 | ||
| Output voltage range | VOUT | 4.5 | 28 | V | 4 | ||
| Inductance range | L | 2.2 | 4.7 | 22 | µH | 4 | |
| Effective input capacitance range | CIN | 1 | 10 | µF | 4 | ||
| Effective output capacitance range | COUT | 1 | 10 | µF | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 145.8 | °C/W | DDC (SOT23) 5 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 77.6 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 56.5 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 28.5 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 54.9 | °C/W | 4 | |||
| UVLO hysteresis | VIN_HYS | 160 | mV | 5 | |||
| Low-side MOSFET on resistance | RDS(on) | 200 | mΩ | VIN = 5V, VOUT = 12V | 5 | ||
| Soft startup time | tSTARTUP | 2.5 | ms | Internal SS ramp time, from 0V to VREF | 5 | ||
| EN logic high threshold | VEN_H | 1.2 | V | 5 | |||
| EN logic low threshold | VEN_L | 0.4 | V | 5 | |||
| EN pull down resistor | REN | 1 | MΩ | 5 | |||
| Thermal shutdown threshold | TSD | 170 | °C | TJ rising | 5 | ||
| Thermal shutdown hysteresis | TSD_HYS | 20 | °C | TJ falling below TSD | 5 |
CAD (KiCad official)
- Symbol:
TLV61047DDCR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv61047ddcr-etched.step/tlv61047ddcr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv61047ddcr.step/tlv61047ddcr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
9efb3582146c983a, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).