component

TLV5639IDW

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DAC), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata acquisitiontlv5639idwfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14d ago
viewers tlv5639idw: viewers · Ray 14d ago
package.json Publish 0.1.0 · Ray 14d ago
page.json Set visibility: public · Ray 14d ago
README.md Publish 0.1.0 · Ray 14d ago
tlv5639idw-etched.glb tlv5639idw: factory component page (tier=lcsc) · Ray 14d ago
tlv5639idw-etched.step tlv5639idw: factory component page (tier=lcsc) · Ray 14d ago
tlv5639idw-hero.glb tlv5639idw: hero GLB from the etched model (keeps the MPN mark) · Ray 14d ago
tlv5639idw-hero.overlay.json Publish 0.1.0 · Ray 14d ago
tlv5639idw.glb Publish 0.1.0 · Ray 14d ago
tlv5639idw.kicad_mod Publish 0.1.0 · Ray 14d ago
tlv5639idw.kicad_sym Publish 0.1.0 · Ray 14d ago
tlv5639idw.lbr Publish 0.1.0 · Ray 14d ago
tlv5639idw.step Publish 0.1.0 · Ray 14d ago

TLV5639IDW

Texas Instruments · Digital To Analog Converters (DAC) · SOIC-20-300mil

TLV5639IDW from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D2 input Parallel data input bit D2 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
2 D3 input Parallel data input bit D3 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
3 D4 input Parallel data input bit D4 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
4 D5 input Parallel data input bit D5 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
5 D6 input Parallel data input bit D6 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
6 D7 input Parallel data input bit D7 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
7 D8 input Parallel data input bit D8 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
8 D9 input Parallel data input bit D9 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
9 D10 input Parallel data input bit D10 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
10 D11 input Parallel data input bit D11 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
11 VDD power_in Positive power supply, 2.7 V to 5.5 V referenced to AGND (VDD = 5 V: 4.5 V to 5.5 V; VDD = 3 V: 2.7 V to 3.3 V).
12 REF bidirectional Analog reference voltage input or output; as an input it must be between AGND and VDD − 1.5 V, and the internal reference buffer must be disabled when an external reference is used.
13 OUT output DAC analog voltage output from the rail-to-rail x2 buffer, specified with a load of at least 2 kΩ and at most 100 pF load capacitance.
14 AGND power_in Analog ground reference for the device.
15 REG input Register select digital input: REG = 0 writes data to the DAC holding latch and REG = 1 writes to the control register.
16 LDAC input Active-low load DAC input that transfers the holding latch value to the DAC; it is asynchronous and may be held low when a separate update is not needed.
17 WE input Active-low write enable digital input; data is latched on its positive edge and it requires a minimum high pulse width of 20 ns.
18 CS input Active-low chip select digital input that enables the digital inputs; the device must be enabled with CS low to latch data.
19 D0 input Parallel data input bit D0 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.
20 D1 input Parallel data input bit D1 of the 12-bit DAC data word, latched on the positive edge of WE while CS is low.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Data Acquisition
Pins 20

CAD (KiCad official)

  • Symbol: TLV5639IDW
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: tlv5639idw-etched.step / tlv5639idw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv5639idw.step / tlv5639idw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 cafaf2673d245e0f, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF