component
TLV5638CDR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"dependencies": {},
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"component": {
"mpn": "TLV5638CDR",
"manufacturer": "Texas Instruments",
"package": "SOIC-8",
"pin_count": 8,
"category": "Data Acquisition",
"subcategory": "Digital To Analog Converters (DAC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/tlv5638",
"parts": {
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"distributor_links": {
"lcsc": "C1554719",
"digikey": "296-41710-2-ND",
"mouser": "595-TLV5638CDR"
},
"distributor_check": {
"checked_at": "2026-10-08T14:40:54Z",
"source": "Component Ocean /api/assign-pns",
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"pn": "296-41710-2-ND",
"status": "found"
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"pins": [
{
"number": "1",
"name": "DIN",
"type": "input",
"description": "Digital serial data input that receives the 16-bit control and data word, with data setup of 10 ns minimum and hold of 5 ns minimum relative to the SCLK falling edge."
},
{
"number": "2",
"name": "SCLK",
"type": "input",
"description": "Digital serial clock input, with a maximum serial clock frequency of 20 MHz and minimum SCLK pulse width high and low of 25 ns each."
},
{
"number": "3",
"name": "CS",
"type": "input",
"description": "Active-low chip select that enables the digital inputs, requiring CS low at least 10 ns before the first negative SCLK edge."
},
{
"number": "4",
"name": "OUTA",
"type": "output",
"description": "DAC A analog voltage output from the x2 rail-to-rail buffer, specified from 0 V to VDD - 0.4 V at RL = 10 kΩ and driving up to 100 pF load capacitance."
},
{
"number": "5",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for the device."
},
{
"number": "6",
"name": "REF",
"type": "bidirectional",
"description": "Analog reference voltage input or output; as an input it accepts 0 V to VDD - 1.5 V, and as an output the internal reference can source or sink up to 1 mA with a 100 pF load limit."
},
{
"number": "7",
"name": "OUTB",
"type": "output",
"description": "DAC B analog voltage output from the x2 rail-to-rail buffer, specified from 0 V to VDD - 0.4 V at RL = 10 kΩ and driving up to 100 pF load capacitance."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Positive single-supply input, 2.7 V to 5.5 V recommended with respect to AGND and 7 V absolute maximum."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pinout taken from the D (SOIC-8) package terminal table and the D-package top view on page 1. The TL; Pin descriptions for REF and OUTA/OUTB combine the terminal-table text with the electrical-character"
],
"pages_sent": 27,
"cost_usd": 0.0984,
"at": "2026-10-08T14:40:38"
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"url": "https://www.ti.com/cn/lit/gpn/tlv5638",
"pages": 27,
"sha256": "5e8282e329ce688a",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
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"refuses_to_fabricate": true
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