component
TLV5631IPW
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"manufacturer": "Texas Instruments",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Data Acquisition",
"subcategory": "Digital To Analog Converters (DAC)",
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"pins": [
{
"number": "1",
"name": "DGND",
"type": "power_in",
"description": "Digital ground reference for the serial interface and digital logic."
},
{
"number": "2",
"name": "DIN",
"type": "input",
"description": "Digital serial data input; the 16-bit word (4 control and 12 data bits) is shifted in MSB first on the falling edges of SCLK."
},
{
"number": "3",
"name": "SCLK",
"type": "input",
"description": "Serial clock input, with a maximum serial clock frequency of 30 MHz."
},
{
"number": "4",
"name": "FS",
"type": "input",
"description": "Frame sync input; a falling edge starts the write cycle, and in µC mode FS must be held low until all 16 data bits are transferred."
},
{
"number": "5",
"name": "PRE",
"type": "input",
"description": "Preset input, asynchronous to the clock; driving it low while LDAC is asserted sets the DAC outputs to the value in the preset register."
},
{
"number": "6",
"name": "OUTE",
"type": "output",
"description": "DAC output E, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "7",
"name": "OUTF",
"type": "output",
"description": "DAC output F, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "8",
"name": "OUTG",
"type": "output",
"description": "DAC output G, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "9",
"name": "OUTH",
"type": "output",
"description": "DAC output H, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "10",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for the DAC resistor strings and output amplifiers."
},
{
"number": "11",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply: 4.5 V to 5.5 V for 5 V operation or 2.7 V to 3.3 V for 3 V operation; AVDD must come up before DVDD for correct power-on reset."
},
{
"number": "12",
"name": "OUTA",
"type": "output",
"description": "DAC output A, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "13",
"name": "OUTB",
"type": "output",
"description": "DAC output B, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "14",
"name": "OUTC",
"type": "output",
"description": "DAC output C, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "15",
"name": "OUTD",
"type": "output",
"description": "DAC output D, a rail-to-rail buffered output (gain of two) that reliably drives a 2 kΩ load with 100 pF load capacitance."
},
{
"number": "16",
"name": "REF",
"type": "bidirectional",
"description": "Voltage reference input/output: accepts an external reference up to AVDD, or outputs the internal 1.024 V or 2.048 V reference (up to 1 mA), which needs a 1 µF to 10 µF capacitor in parallel with 100 pF."
},
{
"number": "17",
"name": "MODE",
"type": "input",
"description": "DSP/µC mode select: High = µC mode, not connected = DSP mode."
},
{
"number": "18",
"name": "LDAC",
"type": "input",
"description": "Load DAC input; the DAC outputs are updated only while this asynchronous input is low."
},
{
"number": "19",
"name": "DOUT",
"type": "output",
"description": "Digital serial data output that repeats the DIN data with a 16-clock-cycle delay for daisy-chaining when enabled through the CTRL0 DO bit."
},
{
"number": "20",
"name": "DVDD",
"type": "power_in",
"description": "Digital power supply: 4.5 V to 5.5 V for 5 V operation or 2.7 V to 3.3 V for 3 V operation."
}
],
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"primary_model": "claude-haiku-5-5",
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"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin diagram text on page 1 is scrambled by text extraction, so the pin-number mapping was taken ; The datasheet lists TLV5631IPW as a TSSOP (PW) 20-pin orderable part in the package option addendum,; The schema has no field for specs, so the supply and reference ratings are included only in pin desc"
],
"pages_sent": 25,
"cost_usd": 0.1032,
"at": "2026-10-10T02:02:33"
},
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"url": "https://www.ti.com/cn/lit/gpn/tlv5630",
"pages": 25,
"sha256": "fca921911e680eae",
"source_tier": "lcsc"
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