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TLV5630IPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV5630IPWR
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-20
TLV5630IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DGND | power_in | Digital ground, reference for all digital signal voltages. |
| 2 | DIN | input | Digital serial data input, MSB-first 16-bit data words on SCLK falling edges. |
| 3 | SCLK | input | Serial clock input, up to 30 MHz maximum frequency. |
| 4 | FS | input | Frame sync input, marks beginning of serial data frame. |
| 5 | PRE | input | Preset input, asynchronous; low with LDAC asserted loads preset value to all eight DAC outputs. |
| 6 | OUTE | output | DAC output E, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 7 | OUTF | output | DAC output F, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 8 | OUTG | output | DAC output G, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 9 | OUTH | output | DAC output H, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 10 | AGND | power_in | Analog ground, reference for analog signal voltages. |
| 11 | AVDD | power_out | Analog power supply, 2.7 V to 5.5 V operating range. |
| 12 | OUTA | output | DAC output A, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 13 | OUTB | output | DAC output B, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 14 | OUTC | output | DAC output C, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 15 | OUTD | output | DAC output D, 0 to AVDD-0.4 V output range, 2 kΩ minimum load impedance. |
| 16 | REF | bidirectional | Voltage reference input/output, 0 to AVDD V input, 50 kΩ input impedance, programmable 1.024 V or 2.048 V output. |
| 17 | MODE | input | DSP/µC mode pin, high selects µC mode, low or no connect selects DSP mode. |
| 18 | LDAC | input | Load DAC asynchronous input, low state transfers DAC latch to all outputs simultaneously. |
| 19 | DOUT | output | Digital serial data output, shifts out data from DIN with 16-cycle delay for daisy-chaining. |
| 20 | DVDD | power_out | Digital power supply, 2.7 V to 5.5 V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Data Acquisition |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TLV5630IPWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
tlv5630ipwr-etched.step/tlv5630ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv5630ipwr.step/tlv5630ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
fca921911e680eae, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).