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TLV5628CDWR

Texas Instruments · Digital To Analog Converters (DAC) · SOIC-16-300mil

TLV5628CDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DACB output DACB analog voltage output, which swings between GND and either 1 or 2 times its reference voltage as selected by the RNG bit.
2 DACA output DACA analog voltage output, which swings between GND and either 1 or 2 times its reference voltage as selected by the RNG bit.
3 GND power_in Ground return and reference terminal; the DAC resistor strings are tied to this pin and the device is monotonic referenced to it.
4 DATA input Serial-interface digital data input; the 12-bit command word is entered MSB first, clocked in on each falling edge of CLK while LOAD is high.
5 CLK input Serial-interface clock; data enters on the negative (falling) edge, with a maximum CLK frequency of 1 MHz.
6 VDD power_in Positive supply voltage; recommended range is 2.7 V to 5.25 V, and the electrical characteristics are specified for 3 V to 3.6 V.
7 DACE output DACE analog voltage output, which swings between GND and either 1 or 2 times the REF2 reference voltage as selected by the RNG bit.
8 DACF output DACF analog voltage output, which swings between GND and either 1 or 2 times the REF2 reference voltage as selected by the RNG bit.
9 DACG output DACG analog voltage output, which swings between GND and either 1 or 2 times the REF2 reference voltage as selected by the RNG bit.
10 DACH output DACH analog voltage output, which swings between GND and either 1 or 2 times the REF2 reference voltage as selected by the RNG bit.
11 REF2 input High-impedance buffered reference voltage input for DACE through DACH; the DACs present a high-impedance load to this source.
12 LOAD input Serial-interface load control; after all data bits are clocked in, LOAD is pulsed low to transfer the word to the selected DAC.
13 LDAC input DAC-update latch control; when LDAC is low the selected DAC output updates with LOAD, and when high the new value is held until LDAC is pulsed low.
14 REF1 input High-impedance buffered reference voltage input for DACA through DACD per the detailed description; the DACs present a high-impedance load to this source.
15 DACD output DACD analog voltage output, which swings between GND and either 1 or 2 times the REF1 reference voltage as selected by the RNG bit.
16 DACC output DACC analog voltage output, which swings between GND and either 1 or 2 times the REF1 reference voltage as selected by the RNG bit.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: TLV5628CDWR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: tlv5628cdwr-etched.step / tlv5628cdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv5628cdwr.step / tlv5628cdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 e0db43a94297e99f, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF