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TLV5627CPWR
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Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# TLV5627CPWR++**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-16++TLV5627CPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVDD | power_in | Digital supply for the serial interface, which can be any value between 2.7 V and 5.5 V and is independent of AVDD. |+| 2 | PD | input | Active-low power-down pin that powers down all DACs (overriding their individual power-down settings) and all output stages. |+| 3 | LDAC | input | Load DAC: when high, no DAC output updates occur as input data is read into the serial interface, and the DAC outputs update only when LDAC is low. |+| 4 | DIN | input | Serial data input, shifted in MSB first on the falling edges of SCLK. |+| 5 | SCLK | input | Serial clock input, with a maximum serial clock rate of 20 MHz. |+| 6 | CS | input | Chip select input, active low; the device is enabled only when CS is low. |+| 7 | FS | input | Frame sync input; the falling edge of the frame sync pulse indicates the start of a serial data frame shifted into the TLV5627. |+| 8 | DGND | power_in | Digital ground for the serial interface supply. |+| 9 | AGND | power_in | Analog ground for the DACs, reference buffers and output buffers. |+| 10 | REFINCD | input | Voltage reference input for DACs C and D, with an input voltage range of 0 V to AVDD − 1.5 V. |+| 11 | OUTD | output | DAC D voltage output from the rail-to-rail x2 gain output buffer. |+| 12 | OUTC | output | DAC C voltage output from the rail-to-rail x2 gain output buffer. |+| 13 | OUTB | output | DAC B voltage output from the rail-to-rail x2 gain output buffer. |+| 14 | OUTA | output | DAC A voltage output from the rail-to-rail x2 gain output buffer. |+| 15 | REFINAB | input | Voltage reference input for DACs A and B, with an input voltage range of 0 V to AVDD − 1.5 V. |+| 16 | AVDD | power_in | Analog supply for the DACs, reference buffers and output buffers, which can be any value between 2.7 V and 5.5 V and is independent of DVDD. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `TLV5627CPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `tlv5627cpwr-etched.step` / `tlv5627cpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv5627cpwr.step` / `tlv5627cpwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv5627) (24 pp, sha256 `872ad78ca749d1ea`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv5627cpwr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "tlv5627cpwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tlv5627cpwr.kicad_sym",+ "tlv5627cpwr.kicad_mod",+ "tlv5627cpwr.glb",+ "tlv5627cpwr.step",+ "tlv5627cpwr.lbr",+ "docs/hero.png",+ "docs/tlv5627cpwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tlv5627cpwr-hero.glb",+ "tlv5627cpwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TLV5627CPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tlv5627",+ "parts": {+ "symbol": "tlv5627cpwr.kicad_sym",+ "footprint": "tlv5627cpwr.kicad_mod",+ "model_3d": "tlv5627cpwr-hero.glb",+ "model_3d_plain": "tlv5627cpwr.glb",+ "model_3d_step": "tlv5627cpwr-etched.step",+ "model_3d_step_plain": "tlv5627cpwr.step",+ "lbr": "tlv5627cpwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2679709",+ "digikey": "TLV5627CPWR-ND",+ "mouser": "595-TLV5627CPWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:14:25Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "TLV5627CPWR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TLV5627CPWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital supply for the serial interface, which can be any value between 2.7 V and 5.5 V and is independent of AVDD."+ },+ {+ "number": "2",+ "name": "PD",+ "type": "input",+ "description": "Active-low power-down pin that powers down all DACs (overriding their individual power-down settings) and all output stages."+ },+ {+ "number": "3",+ "name": "LDAC",+ "type": "input",+ "description": "Load DAC: when high, no DAC output updates occur as input data is read into the serial interface, and the DAC outputs update only when LDAC is low."+ },+ {+ "number": "4",+ "name": "DIN",+ "type": "input",+ "description": "Serial data input, shifted in MSB first on the falling edges of SCLK."+ },+ {+ "number": "5",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input, with a maximum serial clock rate of 20 MHz."+ },+ {+ "number": "6",+ "name": "CS",+ "type": "input",+ "description": "Chip select input, active low; the device is enabled only when CS is low."+ },+ {+ "number": "7",+ "name": "FS",+ "type": "input",+ "description": "Frame sync input; the falling edge of the frame sync pulse indicates the start of a serial data frame shifted into the TLV5627."+ },+ {+ "number": "8",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground for the serial interface supply."+ },+ {+ "number": "9",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground for the DACs, reference buffers and output buffers."+ },+ {+ "number": "10",+ "name": "REFINCD",+ "type": "input",+ "description": "Voltage reference input for DACs C and D, with an input voltage range of 0 V to AVDD − 1.5 V."+ },+ {+ "number": "11",+ "name": "OUTD",+ "type": "output",+ "description": "DAC D voltage output from the rail-to-rail x2 gain output buffer."+ },+ {+ "number": "12",+ "name": "OUTC",+ "type": "output",+ "description": "DAC C voltage output from the rail-to-rail x2 gain output buffer."+ },+ {+ "number": "13",+ "name": "OUTB",+ "type": "output",+ "description": "DAC B voltage output from the rail-to-rail x2 gain output buffer."+ },+ {+ "number": "14",+ "name": "OUTA",+ "type": "output",+ "description": "DAC A voltage output from the rail-to-rail x2 gain output buffer."+ },+ {+ "number": "15",+ "name": "REFINAB",+ "type": "input",+ "description": "Voltage reference input for DACs A and B, with an input voltage range of 0 V to AVDD − 1.5 V."+ },+ {+ "number": "16",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog supply for the DACs, reference buffers and output buffers, which can be any value between 2.7 V and 5.5 V and is independent of DVDD."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet covers the D (SOIC) and PW (TSSOP) packages with one shared pinout (page 1 drawing 'D ; The output schema has no field for headline electrical specs, so none were extracted. Supply range ("+ ],+ "pages_sent": 24,+ "cost_usd": 0.0992,+ "at": "2026-10-08T16:13:54"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tlv5627",+ "pages": 24,+ "sha256": "872ad78ca749d1ea",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tlv5627cpwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tlv5627cpwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "c82be2184010248566c3f048aed145ce0eb4d2517d2a56de46780bf6210a35b9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}