component
TLV5627CPWR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV5627CPWR
Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-16
TLV5627CPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVDD | power_in | Digital supply for the serial interface, which can be any value between 2.7 V and 5.5 V and is independent of AVDD. |
| 2 | PD | input | Active-low power-down pin that powers down all DACs (overriding their individual power-down settings) and all output stages. |
| 3 | LDAC | input | Load DAC: when high, no DAC output updates occur as input data is read into the serial interface, and the DAC outputs update only when LDAC is low. |
| 4 | DIN | input | Serial data input, shifted in MSB first on the falling edges of SCLK. |
| 5 | SCLK | input | Serial clock input, with a maximum serial clock rate of 20 MHz. |
| 6 | CS | input | Chip select input, active low; the device is enabled only when CS is low. |
| 7 | FS | input | Frame sync input; the falling edge of the frame sync pulse indicates the start of a serial data frame shifted into the TLV5627. |
| 8 | DGND | power_in | Digital ground for the serial interface supply. |
| 9 | AGND | power_in | Analog ground for the DACs, reference buffers and output buffers. |
| 10 | REFINCD | input | Voltage reference input for DACs C and D, with an input voltage range of 0 V to AVDD − 1.5 V. |
| 11 | OUTD | output | DAC D voltage output from the rail-to-rail x2 gain output buffer. |
| 12 | OUTC | output | DAC C voltage output from the rail-to-rail x2 gain output buffer. |
| 13 | OUTB | output | DAC B voltage output from the rail-to-rail x2 gain output buffer. |
| 14 | OUTA | output | DAC A voltage output from the rail-to-rail x2 gain output buffer. |
| 15 | REFINAB | input | Voltage reference input for DACs A and B, with an input voltage range of 0 V to AVDD − 1.5 V. |
| 16 | AVDD | power_in | Analog supply for the DACs, reference buffers and output buffers, which can be any value between 2.7 V and 5.5 V and is independent of DVDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
TLV5627CPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
tlv5627cpwr-etched.step/tlv5627cpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv5627cpwr.step/tlv5627cpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
872ad78ca749d1ea, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).