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TLV5625ID

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 15d ago
viewers tlv5625id: viewers · Ray 15d ago
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README.md Publish 0.1.0 · Ray 15d ago
tlv5625id-etched.glb tlv5625id: factory component page (tier=mfr) · Ray 15d ago
tlv5625id-etched.step tlv5625id: factory component page (tier=mfr) · Ray 15d ago
tlv5625id-hero.glb tlv5625id: hero GLB from the etched model (keeps the MPN mark) · Ray 15d ago
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tlv5625id.glb Publish 0.1.0 · Ray 15d ago
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tlv5625id.lbr Publish 0.1.0 · Ray 15d ago
tlv5625id.step Publish 0.1.0 · Ray 15d ago

TLV5625ID

Texas Instruments · Digital To Analog Converters (DAC) · SOIC-8

TLV5625ID from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIN input Digital serial data input, shifted in MSB first on falling SCLK edges as a 16-bit word; digital inputs are limited to −0.3 V to VDD + 0.3 V.
2 SCLK input Digital serial clock input, with a maximum clock frequency of 20 MHz and minimum SCLK high and low pulse widths of 25 ns.
3 CS input Chip select, digital input active low, used to enable and disable the serial inputs; CS must be low at least 10 ns before the first negative SCLK edge.
4 OUTA output DAC A analog voltage output from the x2 rail-to-rail buffer, specified for an output range of 0 to VDD−0.4 V at RL = 10 kΩ and CL = 100 pF.
5 AGND power_in Analog ground reference for the device, to be connected to the system analog ground plane, with the 0.1 µF VDD-to-AGND bypass capacitor mounted close to the device.
6 REF input Analog reference voltage input, specified from 0 to VDD−1.5 V; a reference at or above (VDD−0.4 V)/2 clips the transfer function because of the x2 output buffer.
7 OUTB output DAC B analog voltage output from the x2 rail-to-rail buffer, specified for an output range of 0 to VDD−0.4 V at RL = 10 kΩ and CL = 100 pF.
8 VDD power_in Positive single-supply input, specified from 2.7 V to 5.5 V (4.5 V to 5.5 V at 5 V nominal, 2.7 V to 3.3 V at 3 V nominal).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Data Acquisition
Pins 8

CAD (KiCad official)

  • Symbol: TLV5625ID
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlv5625id-etched.step / tlv5625id-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv5625id.step / tlv5625id.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 3b0fb79bf752efd0, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF