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Initial commit: component/tlv5623idr

Ray ·cf4e998064 ·19d ago
2 files changed +242
README.mdadded+44
@@ -0,0 +1,44 @@+# TLV5623IDR++**Texas Instruments** · Digital To Analog Converters (DAC) · SOIC-8++TLV5623IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DIN | input | Serial digital data input; the 16-bit word is shifted in MSB first on the falling edges of SCLK while CS is low and FS is low. |+| 2 | SCLK | input | Serial digital clock input; the maximum clock frequency is 20 MHz per the recommended operating conditions. |+| 3 | CS | input | Chip select, digital input, active low; it enables the serial interface when low and can be tied low in three-wire operation. |+| 4 | FS | input | Frame sync digital input used for 4-wire serial interfaces such as the TMS320 DSP interface; a falling edge starts the data shift and the DAC updates after 16 bits or on the FS rising edge. |+| 5 | AGND | power_in | Analog ground; the datasheet recommends connecting it to the system analog ground plane, with a 0.1 µF bypass between VDD and AGND. |+| 6 | REFIN | input | Reference analog input voltage to a high-impedance buffer; the range is AGND to VDD−1.5 V, and a reference at or above VDD/2 clips the transfer function because of the x2 output buffer. |+| 7 | OUT | output | DAC analog output from the rail-to-rail x2 output buffer; the recommended load is 2 kΩ to 10 kΩ with load capacitance up to 100 pF. |+| 8 | VDD | power_in | Positive power supply; the device operates from 2.7 V to 5.5 V, with VDD to AGND rated at 7 V maximum. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Data Acquisition |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TLV5623IDR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `tlv5623idr-etched.step` / `tlv5623idr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv5623idr.step` / `tlv5623idr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv5623.pdf) (27 pp, sha256 `2f53a7eb1371df7b`, retrieved 2026-10-07, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv5623idr-datasheet.pdf)
page.jsonadded+198
@@ -0,0 +1,198 @@+{+  "slug": "tlv5623idr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "tlv5623idr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tlv5623idr.kicad_sym",+    "tlv5623idr.kicad_mod",+    "tlv5623idr.glb",+    "tlv5623idr.step",+    "tlv5623idr.lbr",+    "docs/hero.png",+    "docs/tlv5623idr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tlv5623idr-hero.glb",+    "tlv5623idr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TLV5623IDR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Data Acquisition",+    "subcategory": "Digital To Analog Converters (DAC)",+    "datasheet": "https://www.ti.com/lit/ds/symlink/tlv5623.pdf",+    "parts": {+      "symbol": "tlv5623idr.kicad_sym",+      "footprint": "tlv5623idr.kicad_mod",+      "model_3d": "tlv5623idr-hero.glb",+      "model_3d_plain": "tlv5623idr.glb",+      "model_3d_step": "tlv5623idr-etched.step",+      "model_3d_step_plain": "tlv5623idr.step",+      "lbr": "tlv5623idr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2679587",+      "digikey": "296-TLV5623IDRTR-ND",+      "mouser": "595-TLV5623IDR"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T22:30:33Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-TLV5623IDRTR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TLV5623IDR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "DIN",+        "type": "input",+        "description": "Serial digital data input; the 16-bit word is shifted in MSB first on the falling edges of SCLK while CS is low and FS is low."+      },+      {+        "number": "2",+        "name": "SCLK",+        "type": "input",+        "description": "Serial digital clock input; the maximum clock frequency is 20 MHz per the recommended operating conditions."+      },+      {+        "number": "3",+        "name": "CS",+        "type": "input",+        "description": "Chip select, digital input, active low; it enables the serial interface when low and can be tied low in three-wire operation."+      },+      {+        "number": "4",+        "name": "FS",+        "type": "input",+        "description": "Frame sync digital input used for 4-wire serial interfaces such as the TMS320 DSP interface; a falling edge starts the data shift and the DAC updates after 16 bits or on the FS rising edge."+      },+      {+        "number": "5",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground; the datasheet recommends connecting it to the system analog ground plane, with a 0.1 µF bypass between VDD and AGND."+      },+      {+        "number": "6",+        "name": "REFIN",+        "type": "input",+        "description": "Reference analog input voltage to a high-impedance buffer; the range is AGND to VDD−1.5 V, and a reference at or above VDD/2 clips the transfer function because of the x2 output buffer."+      },+      {+        "number": "7",+        "name": "OUT",+        "type": "output",+        "description": "DAC analog output from the rail-to-rail x2 output buffer; the recommended load is 2 kΩ to 10 kΩ with load capacitance up to 100 pF."+      },+      {+        "number": "8",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive power supply; the device operates from 2.7 V to 5.5 V, with VDD to AGND rated at 7 V maximum."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 27,+        "cost_usd": 0.0966,+        "at": "2026-10-07T22:30:17"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/tlv5623.pdf",+        "pages": 27,+        "sha256": "2f53a7eb1371df7b",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tlv5623idr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tlv5623idr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "8954e4aee6786388827d94de5cdf1dc97a83de50eeed2ab7be6ea9380c2af2fc",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file