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TLV5619CDWR

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DACs), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV5619CDWR

Texas Instruments · Digital To Analog Converters (DACs) · SOIC-20-300mil

TLV5619CDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D2 input Parallel data input, bit 2 of the 12-bit DAC code (the data bits are double buffered).
2 D3 input Parallel data input, bit 3 of the 12-bit DAC code.
3 D4 input Parallel data input, bit 4 of the 12-bit DAC code.
4 D5 input Parallel data input, bit 5 of the 12-bit DAC code.
5 D6 input Parallel data input, bit 6 of the 12-bit DAC code.
6 D7 input Parallel data input, bit 7 of the 12-bit DAC code.
7 D8 input Parallel data input, bit 8 of the 12-bit DAC code.
8 D9 input Parallel data input, bit 9 of the 12-bit DAC code.
9 D10 input Parallel data input, bit 10 of the 12-bit DAC code.
10 D11 input Parallel data input, MSB (bit 11) of the 12-bit DAC code.
11 VDD power_in Positive power supply; 4.5 V to 5.5 V for the 5-V supply and 2.7 V to 3.3 V for the 3-V supply, and the reference input must stay at or below VDD − 1.5 V.
12 REFIN input Voltage reference input, 0 V to VDD − 1.5 V; reference voltages above VDD/2 cause output saturation at large DAC codes.
13 OUT output Analog output voltage from the internal ×2 rail-to-rail buffer amplifier, with a 10 kΩ minimum load and 100 pF maximum load capacitance.
14 GND power_in Ground reference for the device; the output buffer cannot drive below this rail.
15 PD input When low, disables all buffer amplifier voltages to reduce supply current (power-down mode); tie to VDD to keep the DAC active.
16 LDAC input Load DAC input; a low level transfers the holding-latch value to the DAC, and it is asynchronous so it can be held low.
17 WE input Write enable; the device latches the data on the positive WE edge and must be enabled with CS low.
18 CS input Chip select; the device is enabled for writes only when CS is low.
19 D0 input Parallel data input, LSB (bit 0) of the 12-bit DAC code.
20 D1 input Parallel data input, bit 1 of the 12-bit DAC code.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category ADC/DAC/Data Conversion
Pins 20

CAD (KiCad official)

  • Symbol: TLV5619CDWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: tlv5619cdwr-etched.step / tlv5619cdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv5619cdwr.step / tlv5619cdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 31589d577aa88ec8, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF