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TLV5610IPWR

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Texas Instruments Digital To Analog Converters (DAC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV5610IPWR

Texas Instruments · Digital To Analog Converters (DAC) · TSSOP-20

TLV5610IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DGND power_in Digital ground.
2 DIN input Digital serial data input, sampled on falling SCLK edges with a 16-bit word (4 address/control bits plus 12 data bits), MSB first.
3 SCLK input Serial clock input, maximum 30 MHz.
4 FS input Frame sync input whose falling edge starts shifting data on DIN; in uC mode it must stay low until all 16 bits are transferred.
5 PRE input Asynchronous preset input; driving it low with LDAC asserted drives all DAC outputs to the value in the preset register.
6 OUTE output DAC E analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
7 OUTF output DAC F analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
8 OUTG output DAC G analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
9 OUTH output DAC H analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
10 AGND power_in Analog ground.
11 AVDD power_in Analog power supply, 2.7 V to 5.5 V (7 V absolute maximum); must come up before DVDD when supplies are separate.
12 OUTA output DAC A analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
13 OUTB output DAC B analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
14 OUTC output DAC C analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
15 OUTD output DAC D analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF.
16 REF input Buffered high-impedance voltage reference input (100 kOhm, 5 pF) ranging from 0 V to AVDD, which may be tied to the supply.
17 MODE input DSP/uC mode pin: high selects uC mode, no connect or low selects DSP mode.
18 LDAC input Asynchronous load DAC input; DAC outputs are updated only while this signal is low.
19 DOUT output Digital serial data output for daisy-chaining, giving DIN data delayed by 16 clock cycles when enabled via the DO bit.
20 DVDD power_in Digital power supply, 2.7 V to 5.5 V (7 V absolute maximum).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Data Acquisition
Pins 20

CAD (KiCad official)

  • Symbol: TLV5610IPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: tlv5610ipwr-etched.step / tlv5610ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv5610ipwr.step / tlv5610ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 5201b308030f0178, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF