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Initial commit: component/tlv5610ipwr

Ray ·d964ef71c4 ·3d ago
2 files changed +286
README.mdadded+56
@@ -0,0 +1,56 @@+# TLV5610IPWR++**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-20++TLV5610IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DGND | power_in | Digital ground. |+| 2 | DIN | input | Digital serial data input, sampled on falling SCLK edges with a 16-bit word (4 address/control bits plus 12 data bits), MSB first. |+| 3 | SCLK | input | Serial clock input, maximum 30 MHz. |+| 4 | FS | input | Frame sync input whose falling edge starts shifting data on DIN; in uC mode it must stay low until all 16 bits are transferred. |+| 5 | PRE | input | Asynchronous preset input; driving it low with LDAC asserted drives all DAC outputs to the value in the preset register. |+| 6 | OUTE | output | DAC E analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 7 | OUTF | output | DAC F analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 8 | OUTG | output | DAC G analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 9 | OUTH | output | DAC H analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 10 | AGND | power_in | Analog ground. |+| 11 | AVDD | power_in | Analog power supply, 2.7 V to 5.5 V (7 V absolute maximum); must come up before DVDD when supplies are separate. |+| 12 | OUTA | output | DAC A analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 13 | OUTB | output | DAC B analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 14 | OUTC | output | DAC C analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 15 | OUTD | output | DAC D analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF. |+| 16 | REF | input | Buffered high-impedance voltage reference input (100 kOhm, 5 pF) ranging from 0 V to AVDD, which may be tied to the supply. |+| 17 | MODE | input | DSP/uC mode pin: high selects uC mode, no connect or low selects DSP mode. |+| 18 | LDAC | input | Asynchronous load DAC input; DAC outputs are updated only while this signal is low. |+| 19 | DOUT | output | Digital serial data output for daisy-chaining, giving DIN data delayed by 16 clock cycles when enabled via the DO bit. |+| 20 | DVDD | power_in | Digital power supply, 2.7 V to 5.5 V (7 V absolute maximum). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-20 |+| Category | Data Acquisition |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `TLV5610IPWR`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `tlv5610ipwr-etched.step` / `tlv5610ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv5610ipwr.step` / `tlv5610ipwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv5608) (25 pp, sha256 `5201b308030f0178`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv5610ipwr-datasheet.pdf)
page.jsonadded+230
@@ -0,0 +1,230 @@+{+  "slug": "tlv5610ipwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "tlv5610ipwr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tlv5610ipwr.kicad_sym",+    "tlv5610ipwr.kicad_mod",+    "tlv5610ipwr.glb",+    "tlv5610ipwr.step",+    "tlv5610ipwr.lbr",+    "docs/hero.png",+    "docs/tlv5610ipwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tlv5610ipwr-hero.glb",+    "tlv5610ipwr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TLV5610IPWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-20",+    "pin_count": 20,+    "category": "Data Acquisition",+    "subcategory": "Digital To Analog Converters (DAC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tlv5608",+    "parts": {+      "symbol": "tlv5610ipwr.kicad_sym",+      "footprint": "tlv5610ipwr.kicad_mod",+      "model_3d": "tlv5610ipwr-hero.glb",+      "model_3d_plain": "tlv5610ipwr.glb",+      "model_3d_step": "tlv5610ipwr-etched.step",+      "model_3d_step_plain": "tlv5610ipwr.step",+      "lbr": "tlv5610ipwr.lbr"+    },+    "distributor_links": {+      "lcsc": 2679903,+      "digikey": "TLV5610IPWR-ND",+      "mouser": "595-TLV5610IPWR"+    },+    "distributor_check": {+      "checked_at": "2026-10-03T07:10:42Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "TLV5610IPWR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TLV5610IPWR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground."+      },+      {+        "number": "2",+        "name": "DIN",+        "type": "input",+        "description": "Digital serial data input, sampled on falling SCLK edges with a 16-bit word (4 address/control bits plus 12 data bits), MSB first."+      },+      {+        "number": "3",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input, maximum 30 MHz."+      },+      {+        "number": "4",+        "name": "FS",+        "type": "input",+        "description": "Frame sync input whose falling edge starts shifting data on DIN; in uC mode it must stay low until all 16 bits are transferred."+      },+      {+        "number": "5",+        "name": "PRE",+        "type": "input",+        "description": "Asynchronous preset input; driving it low with LDAC asserted drives all DAC outputs to the value in the preset register."+      },+      {+        "number": "6",+        "name": "OUTE",+        "type": "output",+        "description": "DAC E analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "7",+        "name": "OUTF",+        "type": "output",+        "description": "DAC F analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "8",+        "name": "OUTG",+        "type": "output",+        "description": "DAC G analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "9",+        "name": "OUTH",+        "type": "output",+        "description": "DAC H analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "10",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground."+      },+      {+        "number": "11",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog power supply, 2.7 V to 5.5 V (7 V absolute maximum); must come up before DVDD when supplies are separate."+      },+      {+        "number": "12",+        "name": "OUTA",+        "type": "output",+        "description": "DAC A analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "13",+        "name": "OUTB",+        "type": "output",+        "description": "DAC B analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "14",+        "name": "OUTC",+        "type": "output",+        "description": "DAC C analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "15",+        "name": "OUTD",+        "type": "output",+        "description": "DAC D analog voltage output, rail-to-rail buffered with gain of two, able to drive a 2 kOhm load with 100 pF."+      },+      {+        "number": "16",+        "name": "REF",+        "type": "input",+        "description": "Buffered high-impedance voltage reference input (100 kOhm, 5 pF) ranging from 0 V to AVDD, which may be tied to the supply."+      },+      {+        "number": "17",+        "name": "MODE",+        "type": "input",+        "description": "DSP/uC mode pin: high selects uC mode, no connect or low selects DSP mode."+      },+      {+        "number": "18",+        "name": "LDAC",+        "type": "input",+        "description": "Asynchronous load DAC input; DAC outputs are updated only while this signal is low."+      },+      {+        "number": "19",+        "name": "DOUT",+        "type": "output",+        "description": "Digital serial data output for daisy-chaining, giving DIN data delayed by 16 clock cycles when enabled via the DO bit."+      },+      {+        "number": "20",+        "name": "DVDD",+        "type": "power_in",+        "description": "Digital power supply, 2.7 V to 5.5 V (7 V absolute maximum)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 25,+        "cost_usd": 0.1658,+        "at": "2026-10-03T07:10:19"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tlv5608",+        "pages": 25,+        "sha256": "5201b308030f0178",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file