# TLV4387PWR

**Texas Instruments** · Precision Op Amps · TSSOP-14

TLV4387PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT A | output | Output of amplifier channel A. |
| 2 | -IN A | input | Inverting input of amplifier channel A. |
| 3 | +IN A | input | Noninverting input of amplifier channel A. |
| 4 | V+ | power_in | Positive (highest) power supply, 1.7 V to 5.5 V total supply (VS) in single-supply operation. |
| 5 | +IN B | input | Noninverting input of amplifier channel B. |
| 6 | -IN B | input | Inverting input of amplifier channel B. |
| 7 | OUT B | output | Output of amplifier channel B. |
| 8 | OUT C | output | Output of amplifier channel C. |
| 9 | -IN C | input | Inverting input of amplifier channel C. |
| 10 | +IN C | input | Noninverting input of amplifier channel C. |
| 11 | V- | power_in | Negative (lowest) power supply, ground in single-supply operation. |
| 12 | +IN D | input | Noninverting input of amplifier channel D. |
| 13 | -IN D | input | Inverting input of amplifier channel D. |
| 14 | OUT D | output | Output of amplifier channel D. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -5 | 1 | 5 | µV | VS = 5.5 V | 7 |
| Input offset voltage | VOS | -6 | 1.25 | 6 | µV | VS = 1.7 V | 7 |
| Input offset voltage drift | dVOS/dT | -0.05 | 0.01 | 0.05 | µV/°C | TA = -40°C to +125°C | 7 |
| Power supply rejection ratio | PSRR | -0.5 | 0.05 | 0.5 | µV/V |  | 7 |
| Power supply rejection ratio | PSRR | -1 |  | 1 | µV/V | TA = -40°C to +125°C | 7 |
| Input bias current | IB | -300 | 60 | 300 | pA |  | 7 |
| Input bias current | IB | -350 |  | 350 | pA | TA = -40°C to +125°C | 7 |
| Input offset current | IOS | -500 | 60 | 500 | pA |  | 7 |
| Input offset current | IOS | -700 |  | 700 | pA | TA = -40°C to +125°C | 7 |
| Common-mode rejection ratio | CMRR | 115 | 138 |  | dB | (V-), 0.1 V < VCM < (V+), VS = 1.7 V | 7 |
| Common-mode rejection ratio | CMRR | 130 | 150 |  | dB | (V-), 0.2 V < VCM < (V+) + 0.1 V, VS = 5.5 V | 7 |
| Common-mode rejection ratio | CMRR | 110 | 132 |  | dB | (V-), 0.1 V < VCM < (V+), TA = -40°C to +125°C | 7 |
| Common-mode rejection ratio | CMRR | 130 |  |  | dB | (V-), 0.2 V < VCM < (V+) + 0.1, VS = 5.5 V, TA = -40°C to +125°C | 7 |
| Open-loop voltage gain | AOL | 120 | 145 |  | dB | (V-) + 100 mV < VOUT < (V+), 100 mV | 7 |
| Open-loop voltage gain | AOL | 115 |  |  | dB | TA = -40°C to +125°C | 7 |
| Voltage output swing from rail |  |  | 1 | 20 | mV | no load | 8 |
| Voltage output swing from rail |  |  | 20 | 75 | mV | RL = 2 kΩ | 8 |
| Quiescent current per amplifier | IQ |  | 570 | 675 | µA | IO = 0 mA | 8 |
| Quiescent current per amplifier | IQ |  |  | 700 | µA | IO = 0 mA, TA = -40°C to 125°C | 8 |
| Turn-on time |  |  | 25 | 100 | µs | VS = 5.5 V, VS ramp rate > 0.3 V/µs, settle to 1% | 8 |
| Supply voltage, single-supply | VS | 1.7 |  | 5.5 | V | VS = (V+), (V-) | 5 |
| Supply voltage, dual-supply | VS | -0.85 |  | 2.75 | V | ±0.85 V to ±2.75 V | 5 |
| Specified temperature | TA | -40 |  | 125 | °C |  | 5 |
| Supply voltage, single-supply | VS |  |  | 6 | V | VS = (V+), (V-) | 5 |
| Supply voltage, dual-supply | VS | -3 |  | 3 | V | ±3 V | 5 |
| Input current, all pins |  | -10 |  | 10 | mA |  | 5 |
| Operating temperature | TA | -55 |  | 150 | °C |  | 5 |
| Junction temperature | TJ | -55 |  | 150 | °C |  | 5 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 5 |
| ESD human-body model | V(ESD) | -3000 |  | 3000 | V | HBM, ANSI/ESDA/JEDEC JS-001 | 5 |
| ESD charged-device model | V(ESD) | -1000 |  | 1000 | V | CDM, ANSI/ESDA/JEDEC JS-002 | 5 |
| Junction-to-ambient thermal resistance | RθJA |  | 109.6 |  | °C/W | PW (TSSOP) 14 pins | 6 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 27.4 |  | °C/W | PW (TSSOP) 14 pins | 6 |
| Junction-to-board thermal resistance | RθJB |  | 56.1 |  | °C/W | PW (TSSOP) 14 pins | 6 |
| Junction-to-top characterization parameter | ΨJT |  | 1.5 |  | °C/W | PW (TSSOP) 14 pins | 6 |
| Junction-to-board characterization parameter | ΨJB |  | 54.9 |  | °C/W | PW (TSSOP) 14 pins | 6 |
| Gain-bandwidth product | GBW |  | 5.7 |  | MHz |  | 8 |
| Slew rate | SR |  | 2.8 |  | V/μs | 4-V step, G = +1 | 8 |
| Short-circuit current | ISC |  | 55 |  | mA | VS = 5.5 V | 8 |
| Short-circuit current | ISC |  | 15 |  | mA | VS = 1.7 V | 8 |
| Phase margin |  |  | 40 |  | degrees | CL = 100 pF, G = +1 | 8 |

## CAD (KiCad official)

- Symbol: `TLV4387PWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `tlv4387pwr-etched.step` / `tlv4387pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv4387pwr.step` / `tlv4387pwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv4387.pdf) (38 pp, sha256 `1be5f3e098d43beb`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlv4387pwr-datasheet.pdf)