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docs tlv431asn1t1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json tlv431asn1t1g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 18h ago
README.md tlv431asn1t1g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tlv431asn1t1g-etched.fit.json tlv431asn1t1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlv431asn1t1g-etched.glb tlv431asn1t1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlv431asn1t1g-etched.step tlv431asn1t1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tlv431asn1t1g.glb Publish 0.1.0 · Ray 1mo ago
tlv431asn1t1g.kicad_mod Publish 0.1.0 · Ray 1mo ago
tlv431asn1t1g.kicad_sym Publish 0.1.0 · Ray 1mo ago
tlv431asn1t1g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 3 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tlv431asn1t1g.step Publish 0.1.0 · Ray 1mo ago

TLV431ASN1T1G

onsemi · Voltage Reference · SOT-23

TLV431ASN1T1G from onsemi, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Reference input Reference (R) input. High-impedance sense input to the internal 1.24 V bandgap reference amplifier (Iref typ 0.15 µA, max 0.3 µA). The device sinks cathode current when V(Reference) exceeds Vref (1.240 V typ) to regulate the KA voltage.
2 Cathode passive Cathode (K). Current-sink terminal that regulates the cathode-to-anode voltage. Rated VKA up to 18 V max, cathode current -20 to +25 mA (typ operating 0.1 mA to 20 mA). Dynamic impedance
3 Anode passive Anode (A). Current-return terminal, typically tied to circuit ground/common. All cathode and reference currents return through this pin.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • TLV431ASN1T1G
  • TLV431ASN1T1GLP
  • TLV431ASN1T1GLPRA
  • TLV431ASN1T1GLPRE
  • TLV431ASN1T1GLPRM
  • TLV431ASN1T1GLPRP

CAD (KiCad official)

  • Symbol: TLV431ASN1T1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tlv431asn1t1g-etched.step / tlv431asn1t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv431asn1t1g.step / tlv431asn1t1g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tlv431asn1t1g.step 59 KB You want the bare part, or you mark your own boards.
tlv431asn1t1g-etched.step 1.7 MB You want the part with TLV431ASN1T1G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 435 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (20 pp, sha256 63404349c3607665, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF