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Ray tlv3704idr: specified limits as data (metadata.characteristics, 32 rows from the datasheet) 82c3cc7 14d ago

TLV3704IDR

Texas Instruments · Comparators · SOIC-14

TLV3704IDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of comparator channel 1.
2 1IN- input Inverting input of comparator channel 1.
3 1IN+ input Noninverting input of comparator channel 1.
4 VCC power_in Positive power supply.
5 2IN+ input Noninverting input of comparator channel 2.
6 2IN- input Inverting input of comparator channel 2.
7 2OUT output Output of comparator channel 2.
8 3OUT output Output of comparator channel 3.
9 3IN- input Inverting input of comparator channel 3.
10 3IN+ input Noninverting input of comparator channel 3.
11 GND power_in Ground.
12 4IN+ input Noninverting input of comparator channel 4.
13 4IN- input Inverting input of comparator channel 4.
14 4OUT output Output of comparator channel 4.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, single supply (I-suffix) VCC 2.7 16 V I-suffix, single supply 6
Supply voltage, split supply (I-suffix) VCC 1.35 8 V I-suffix, split supply, printed ±1.35 V to ±8 V 6
Common-mode input voltage VICR -0.1 V Max printed as VCC + 5 V 6
Operating free-air temperature (I-suffix) TA -40 125 °C I-suffix 6
Supply voltage VCC 17 V 6
Differential input voltage VID -20 20 V Printed as ±20 V 6
Input voltage VI 0 V Max printed as VCC + 5 V; note 3: limited to 20 V max or VCC + 5 V, whichever is smaller 6
Input current II -10 10 mA Printed as ±10 mA 6
Output current IO -10 10 mA Printed as ±10 mA 6
Maximum junction temperature TJ 150 °C 6
Lead temperature 260 °C 1.6 mm (1/16 inch) from case for 10 seconds 6
Storage temperature Tstg -65 150 °C 6
Input offset voltage 25°C VIO 250 5000 µV VIC = VCC/2, RS = 50Ω, TA = 25°C 8
Input offset voltage full range VIO 7000 µV VIC = VCC/2, RS = 50Ω, full range (I-suffix −40°C to 125°C) 8
Input hysteresis voltage 25°C VHYS 1 2.8 5 mV VIC = VCC/2, RS = 50Ω, TA = 25°C 8
Input offset current 25°C IIO 20 100 pA VIC = VCC/2, RS = 50Ω, TA = 25°C 8
Input offset current full range IIO 1000 pA VIC = VCC/2, RS = 50Ω, full range 8
Input bias current 25°C IIB 80 250 pA VIC = VCC/2, RS = 50Ω, TA = 25°C 8
Input bias current full range IIB 1500 pA VIC = VCC/2, RS = 50Ω, full range 8
Low-level output voltage 25°C VOL 80 200 mV VIC = VCC/2, IOH = 50µA, VID = –1V, TA = 25°C (as printed) 8
Low-level output voltage full range VOL 300 mV VIC = VCC/2, IOH = 50µA, VID = –1V, full range 8
Supply current per channel, output high, 25°C ICC 560 800 nA Output state high, TA = 25°C 8
Supply current per channel, output high, full range ICC 1000 nA Output state high, full range 8
Power supply rejection ratio, 2.7 V to 5 V, 25°C PSRR 75 100 dB VIC = VCC/2, no load, VCC = 2.7 V to 5 V, TA = 25°C 8
Power supply rejection ratio, 2.7 V to 5 V, full range PSRR 70 dB VIC = VCC/2, no load, VCC = 2.7 V to 5 V, full range 8
Power supply rejection ratio, 5 V to 15 V, 25°C PSRR 85 105 dB VIC = VCC/2, no load, VCC = 5 V to 15 V, TA = 25°C 8
Power supply rejection ratio, 5 V to 15 V, full range PSRR 80 dB VIC = VCC/2, no load, VCC = 5 V to 15 V, full range 8
Thermal resistance, junction-to-ambient (D, SOIC-14) RθJA 81.4 °C/W D (SOIC) 14-pin package 7
Thermal resistance, junction-to-case (top) (D, SOIC-14) RθJC(top) 38.1 °C/W D (SOIC) 14-pin package 7
Thermal resistance, junction-to-board (D, SOIC-14) RθJB 37.8 °C/W D (SOIC) 14-pin package 7
Junction-to-top characterization parameter (D, SOIC-14) ψJT 7.5 °C/W D (SOIC) 14-pin package 7
Junction-to-board characterization parameter (D, SOIC-14) ψJB 37.4 °C/W D (SOIC) 14-pin package 7

CAD (KiCad official)

  • Symbol: TLV3704IDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tlv3704idr-etched.step / tlv3704idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv3704idr.step / tlv3704idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 82e4a01d5c37ef4d, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF