component
TLV3701QDBVREP
Public Made by Adomby adom
Texas Instruments Comparators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV3701QDBVREP
Texas Instruments · Comparators · SOT-23-5
TLV3701QDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Push-pull CMOS comparator output stage (TLV370x family, rail-to-rail output). |
| 2 | GND | power_in | Ground reference; all voltages except differential voltages are specified with respect to GND. |
| 3 | IN+ | input | Non-inverting input with a common-mode input voltage range of −0.1 V to VCC + 5 V. |
| 4 | IN− | input | Inverting input; for harsh environments the input can be taken 5 V above the positive supply rail without damage, with input voltage limited to 20 V max or VCC + 5 V, whichever is smaller. |
| 5 | VCC | power_in | Positive supply: 2.7 V to 16 V single supply (±1.35 V to ±8 V split), absolute maximum 17 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Operational Amplifier/Comparator |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, single supply | VCC | 2.7 | 16 | V | Single supply | 3 | |
| Supply voltage, split supply | VCC | 1.35 | 8 | V | Split supply (printed ±1.35 V to ±8 V) | 3 | |
| Common-mode input voltage range | VICR | -0.1 | V | 3 | |||
| Operating free-air temperature | TA | -40 | 125 | °C | 3 | ||
| Supply voltage | VCC | 17 | V | Voltages referenced to GND (Note 1) | 3 | ||
| Differential input voltage | VID | -20 | 20 | V | Printed ±20 V | 3 | |
| Input voltage range | VI | 0 | V | Limited to 20 V max or VCC + 5 V, whichever is smaller (Note 2) | 3 | ||
| Input current range | II | -10 | 10 | mA | Printed ±10 mA | 3 | |
| Output current range | IO | -10 | 10 | mA | Printed ±10 mA | 3 | |
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Lead temperature | 260 | °C | 1,6 mm (1/16 inch) from case for 10 seconds | 3 | |||
| Input offset voltage, 25°C | VIO | 250 | 5000 | µV | TA = 25°C | 3 | |
| Input offset voltage, full range | VIO | 7000 | µV | TA = full range (−40°C to 125°C); VIC = VCC/2, RS = 50 Ω | 3 | ||
| Common-mode rejection ratio, VIC = 0 to 2.7 V | CMRR | 55 | 72 | dB | TA = 25°C; VIC = 0 to 2.7 V, RS = 50 Ω | 3 | |
| Common-mode rejection ratio, VIC = 0 to 2.7 V | CMRR | 50 | dB | TA = full range; VIC = 0 to 2.7 V, RS = 50 Ω | 3 | ||
| Common-mode rejection ratio, VIC = 0 to 5 V | CMRR | 60 | 76 | dB | TA = 25°C; VIC = 0 to 5 V, RS = 50 Ω | 3 | |
| Common-mode rejection ratio, VIC = 0 to 5 V | CMRR | 55 | dB | TA = full range; VIC = 0 to 5 V, RS = 50 Ω | 3 | ||
| Common-mode rejection ratio, VIC = 0 to 15 V | CMRR | 65 | 88 | dB | TA = 25°C; VIC = 0 to 15 V, RS = 50 Ω | 3 | |
| Common-mode rejection ratio, VIC = 0 to 15 V | CMRR | 60 | dB | TA = full range; VIC = 0 to 15 V, RS = 50 Ω | 3 | ||
| Input offset current, 25°C | IIO | 20 | 100 | pA | TA = 25°C | 4 | |
| Input offset current, full range | IIO | 1000 | pA | TA = full range; VIC = VCC/2, RS = 50 Ω | 4 | ||
| Input bias current, 25°C | IIB | 80 | 250 | pA | TA = 25°C; VIC = VCC/2, RS = 50 Ω | 4 | |
| Input bias current, full range | IIB | 2000 | pA | TA = full range; VIC = VCC/2, RS = 50 Ω | 4 | ||
| Supply current, output state high, 25°C | ICC | 560 | 800 | nA | TA = 25°C; output state high | 4 | |
| Supply current, output state high, full range | ICC | 1200 | nA | TA = full range; output state high | 4 | ||
| Power supply rejection ratio, VCC = 2.7 V to 5 V | PSRR | 75 | 100 | dB | TA = 25°C; VIC = VCC/2 V, VCC = 2.7 V to 5 V | 4 | |
| Power supply rejection ratio, VCC = 2.7 V to 5 V | PSRR | 70 | dB | TA = full range; VIC = VCC/2 V, VCC = 2.7 V to 5 V | 4 | ||
| Power supply rejection ratio, VCC = 5 V to 15 V | PSRR | 85 | 105 | dB | TA = 25°C; VIC = VCC/2 V, VCC = 5 V to 15 V, no load | 4 | |
| Power supply rejection ratio, VCC = 5 V to 15 V | PSRR | 80 | dB | TA = full range; VIC = VCC/2 V, VCC = 5 V to 15 V, no load | 4 | ||
| Low-level output voltage, IOH = 50 µA, 25°C | VOL | 80 | 200 | mV | TA = 25°C; VIC = VCC/2, IOH = 50 µA, VID = −1 V | 4 | |
| Low-level output voltage, IOH = 50 µA, full range | VOL | 300 | mV | TA = full range; VIC = VCC/2, IOH = 50 µA, VID = −1 V | 4 | ||
| Low-level output voltage, IOH = 2 µA, 25°C | VOL | 8 | mV | TA = 25°C; VIC = VCC/2, IOH = 2 µA, VID = −1 V | 4 | ||
| Power rating, TA ≤ 25°C (DBV) | 385 | mW | DBV package, TA ≤ 25°C | 3 | |||
| Power rating, TA = 125°C (DBV) | 77.1 | mW | DBV package, TA = 125°C | 3 | |||
| Thermal resistance, junction-to-case | θJC | 55 | °C/W | DBV package | 3 | ||
| Thermal resistance, junction-to-ambient | θJA | 324.1 | °C/W | DBV package | 3 | ||
| Offset voltage drift | αVIO | 3 | µV/°C | TA = 25°C; VIC = VCC/2, RS = 50 Ω | 3 | ||
| Differential input resistance | ri(d) | 300 | MΩ | TA = 25°C | 4 | ||
| Large-signal differential voltage amplification | AVD | 1000 | V/mV | TA = 25°C | 3 | ||
| Propagation response time, low-to-high output, overdrive 2 mV | t(PLH) | 240 | µs | f = 1 kHz, VSTEP = 100 mV, overdrive = 2 mV (Note 3) | 4 | ||
| Propagation response time, low-to-high output, overdrive 10 mV | t(PLH) | 64 | µs | f = 1 kHz, VSTEP = 100 mV, overdrive = 10 mV (Note 3) | 4 | ||
| Propagation response time, low-to-high output, overdrive 50 mV | t(PLH) | 36 | µs | f = 1 kHz, VSTEP = 100 mV, overdrive = 50 mV (Note 3) | 4 | ||
| Propagation response time, high-to-low output, overdrive 2 mV | t(PHL) | 167 | µs | VSTEP = 100 mV, CL = 10 pF, VCC = 2.7 V, overdrive = 2 mV (Note 3) | 4 | ||
| Propagation response time, high-to-low output, overdrive 10 mV | t(PHL) | 67 | µs | VSTEP = 100 mV, CL = 10 pF, VCC = 2.7 V, overdrive = 10 mV (Note 3) | 4 | ||
| Propagation response time, high-to-low output, overdrive 50 mV | t(PHL) | 37 | µs | VSTEP = 100 mV, CL = 10 pF, VCC = 2.7 V, overdrive = 50 mV (Note 3) | 4 | ||
| Rise time | tr | 7 | µs | CL = 10 pF, VCC = 2.7 V | 4 | ||
| Fall time | tf | 9 | µs | CL = 10 pF, VCC = 2.7 V | 4 |
CAD (KiCad official)
- Symbol:
TLV3701QDBVREP - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv3701qdbvrep-etched.step/tlv3701qdbvrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv3701qdbvrep.step/tlv3701qdbvrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (12 pp, sha256
f833f4fd6f1d2b87, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).