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TLV3542IDR
Public Made by Adomby adom
Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV3542IDR
Texas Instruments · Operational Amplifier · SOIC-8
TLV3542IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT A | output | Output of channel A. |
| 2 | -IN A | input | Inverting input of channel A. |
| 3 | +IN A | input | Non-inverting input of channel A. |
| 4 | V- | power_in | Negative (lowest) supply pin. |
| 5 | +IN B | input | Non-inverting input of channel B. |
| 6 | -IN B | input | Inverting input of channel B. |
| 7 | OUT B | output | Output of channel B. |
| 8 | V+ | power_in | Positive (highest) supply pin; the supply range is 2.5 V to 5.5 V, measured as V+ to V-. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -10 | 2 | 10 | mV | VS = 5V, TA = 25°C | 6 |
| Input offset voltage drift | dVOS/dT | -4.5 | 4.5 | µV/°C | VS = 5V, TA = -40°C to +125°C | 6 | |
| Input offset current | IOS | -1 | 1 | pA | 6 | ||
| Input offset voltage vs power supply (PSRR) | PSRR | 60 | 70 | dB | VS = 2.7V to 5.5V, VCM = (VS / 2) − 0.55V | 6 | |
| Common-mode rejection ratio | CMRR | 66 | 80 | dB | VS = 5.5V, -0.1V < VCM < 3.5V, TA = 25°C | 6 | |
| Common-mode rejection ratio | CMRR | 56 | 68 | dB | VS = 5.5V, -0.1V < VCM < 5.6V, TA = 25°C | 6 | |
| Open-loop gain | AOL | 92 | 108 | dB | VS = 5V, 0.3V < VO < 5.2V, TA = 25°C | 7 | |
| Voltage output swing from rail | 0.1 | 0.3 | V | VS = 5V, RL = 1kΩ, AOL > 90dB, TA = -40°C to +125°C | 7 | ||
| Specified voltage | VS | 2.7 | 5 | V | 7 | ||
| Operating voltage | VS | 2.5 | 5.5 | V | 7 | ||
| Quiescent current (per amplifier) | IQ | 5.2 | 6.5 | mA | TA = 25°C, VS = 5V, IO = 0A | 7 | |
| Supply voltage, V- to V+ | VS | 2.5 | 5.5 | V | Over operating free-air temperature range | 5 | |
| Specified temperature | TA | -40 | 125 | °C | 5 | ||
| Supply voltage, VS = (V+), (V-) | VS | 7.5 | V | 5 | |||
| Signal input terminals current | II | -10 | 10 | mA | 5 | ||
| Operating temperature | TA | -55 | 125 | °C | 5 | ||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Junction-to-ambient thermal resistance (D SOIC-8) | RθJA | 113.9 | °C/W | TLV3542 D (SOIC) 8 pins | 6 | ||
| Junction-to-case (top) thermal resistance (D SOIC-8) | RθJC(top) | 60.4 | °C/W | TLV3542 D (SOIC) 8 pins | 6 | ||
| Junction-to-board thermal resistance (D SOIC-8) | RθJB | 54.1 | °C/W | TLV3542 D (SOIC) 8 pins | 6 | ||
| Junction-to-top characterization parameter (D SOIC-8) | ψJT | 17.1 | °C/W | TLV3542 D (SOIC) 8 pins | 6 | ||
| Junction-to-board characterization parameter (D SOIC-8) | ψJB | 53.6 | °C/W | TLV3542 D (SOIC) 8 pins | 6 |
CAD (KiCad official)
- Symbol:
TLV3542IDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tlv3542idr-etched.step/tlv3542idr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv3542idr.step/tlv3542idr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
2d16670b33561c28, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).