# TLV3492AIDR

**Texas Instruments** · Comparators · SOIC-8

TLV3492AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT A | output | Channel A output of the push-pull CMOS output stage. |
| 2 | -IN A | input | Inverting input for channel A; the input common-mode range extends 200 mV beyond the supply rails. |
| 3 | +IN A | input | Noninverting input for channel A; the input common-mode range extends 200 mV beyond the supply rails. |
| 4 | V- | power_in | Negative (lowest) power supply. |
| 5 | +IN B | input | Noninverting input for channel B; the input common-mode range extends 200 mV beyond the supply rails. |
| 6 | -IN B | input | Inverting input for channel B; the input common-mode range extends 200 mV beyond the supply rails. |
| 7 | OUT B | output | Channel B output of the push-pull CMOS output stage. |
| 8 | V+ | power_in | Positive (highest) power supply; the recommended supply range is 1.8 V to 5.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -15 | 3 | 15 | mV | TA = 25°C, VCM = 0 V, IO = 0 V | 6 |
| Input offset voltage versus power supply | PSRR |  | 350 | 1000 | µV/V | VS = 1.8 V to 5.5 V | 6 |
| Input bias current | IB | -10 | 1 | 10 | pA | VCM = VCC/2 | 6 |
| Input offset current | IOS | -10 | 1 | 10 | pA | VCM = VCC/2 | 6 |
| Common-mode voltage range | VCM | -0.2 |  | 0.2 | V | Relative to rails: min (V–) – 0.2 V; max (V+) + 0.2 V | 6 |
| Common-mode rejection ratio | CMRR | 60 | 74 |  | dB | VCM = –0.2 V to (V+) – 1.5 V | 6 |
| Common-mode rejection ratio | CMRR | 54 | 62 |  | dB | VCM = –0.2 V to (V+) + 0.2 V | 6 |
| Voltage output high from rail | VOH |  | 90 | 200 | mV | IOUT = 5 mA (OUTPUT, VS = 5 V) | 6 |
| Voltage output low from rail | VOL |  | 160 | 200 | mV | IOUT = 5 mA (OUTPUT, VS = 5 V) | 6 |
| Specified voltage | VS | 1.8 |  | 5.5 | V |  | 6 |
| Operating voltage |  | 1.8 |  | 5.5 | V |  | 6 |
| Quiescent current | IQ |  | 0.85 | 1.2 | µA | VO = 5 V, VO = high | 6 |
| Supply voltage (absolute maximum) |  |  |  | 5.5 | V |  | 5 |
| Signal input pin voltage |  | -0.5 |  | 0.5 | V | Relative to rails: min (V–) – 0.5 V; max (V+) + 0.5 V | 5 |
| Signal input pin current |  | -10 |  | 10 | mA |  | 5 |
| Operating temperature, TA | TA | -40 |  | 125 | °C |  | 5 |
| Junction temperature, TJ | TJ |  |  | 150 | °C |  | 5 |
| Storage temperature, Tstg | Tstg | -65 |  | 150 | °C |  | 5 |
| Supply voltage (recommended) |  | 1.8 |  | 5.5 | V |  | 5 |
| Specified temperature, TA | TA | -40 |  | 125 | °C |  | 5 |
| Junction-to-ambient thermal resistance | RθJA |  | 201.9 |  | °C/W | D (SOIC) 8-pin package | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 92.5 |  | °C/W | D (SOIC) 8-pin package | 5 |
| Junction-to-board thermal resistance | RθJB |  | 123.3 |  | °C/W | D (SOIC) 8-pin package | 5 |
| Junction-to-top characterization parameter | ψJT |  | 23 |  | °C/W | D (SOIC) 8-pin package | 5 |
| Junction-to-board characterization parameter | ψJB |  | 212.6 |  | °C/W | D (SOIC) 8-pin package | 5 |

## CAD (KiCad official)

- Symbol: `TLV3492AIDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlv3492aidr-etched.step` / `tlv3492aidr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv3492aidr.step` / `tlv3492aidr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv3491) (38 pp, sha256 `dbb766978303064d`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlv3492aidr-datasheet.pdf)