# TLV333IDBVR

**Texas Instruments** · Operational Amplifier · SOT-23-5

TLV333IDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output. Rail-to-rail CMOS output stage; short-circuit protected to ground (continuous, one amplifier per package). |
| 2 | V- | power_in | Negative (lowest) power supply. Tie to ground for single-supply operation or to the negative rail for split-supply. Total supply V+ - V- between 1.8 V and 5.5 V (absolute max 7 V). |
| 3 | +IN | input | Noninverting input. Rail-to-rail common-mode range. Input pins are diode-clamped to the supply rails; limit current to 10 mA if signals exceed (V-)-0.3 V or (V+)+0.3 V. |
| 4 | -IN | input | Inverting input. Rail-to-rail common-mode range. Input pins are diode-clamped to the supply rails; limit current to 10 mA if signals exceed (V-)-0.3 V or (V+)+0.3 V. |
| 5 | V+ | power_in | Positive (highest) power supply. Operating range 1.8 V to 5.5 V referenced to V-; absolute maximum total supply 7 V. Bypass with a 0.1-µF ceramic capacitor close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Op-amp/Cmp |
| Pins | 5 |

## Ordering variants

Same part, different packaging or reel option.

- `TLV333IDBVR`
- `TLV333IDBVT`
- `TLV333IDBVRIDCKR`
- `TLV333IDBVRIDCKT`
- `TLV333IDBVRIDR`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VS |  |  | 7 | V | VS = (V+) – (V–) | 6 |
| Signal input pins current |  | -10 |  | 10 | mA | Signal input pins | 6 |
| Operating temperature |  | -40 |  | 150 | °C |  | 6 |
| Junction temperature |  |  |  | 150 | °C |  | 6 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 6 |
| Supply voltage | VS | 1.8 |  | 5.5 | V |  | 6 |
| Specified temperature range |  | -40 |  | 125 | °C |  | 6 |
| Input offset voltage | VOS |  | 2 | 15 | µV | VS = 5 V | 8 |
| VOS vs power supply | PSRR |  | 1 | 8 | µV/V | VS = 1.8 V to 5.5 V | 8 |
| Input bias current | IB | -70 |  | 70 | pA |  | 8 |
| Input bias current over temperature | IB | -150 |  | 150 | pA | TA = –40°C to +125°C | 8 |
| Input offset current | IOS | -140 |  | 140 | pA |  | 8 |
| Common-mode rejection ratio | CMRR | 102 | 115 |  | dB | (V–) – 0.1 V < VCM < (V+) + 0.1 V | 8 |
| Open-loop voltage gain | AOL | 102 | 130 |  | dB | (V–) + 0.1 V< VO < (V+) – 0.1 V | 8 |
| Voltage output swing from rail |  |  | 30 | 70 | mV | TA = –40°C to +125°C | 8 |
| Short-circuit current | ISC | -5 |  | 5 | mA |  | 8 |
| Specified voltage range | VS | 1.8 |  | 5.5 | V |  | 8 |
| Quiescent current per amplifier | IQ |  | 17 | 28 | µA | IO = 0 mA, TA = –40°C to +125°C | 8 |
| Specified range |  | -40 |  | 125 | °C |  | 8 |
| Operating range |  | -40 |  | 150 | °C |  | 8 |
| Storage range |  | -65 |  | 150 | °C |  | 8 |
| Junction-to-ambient thermal resistance | RθJA |  | 220.8 |  | °C/W | DBV (SOT-23, 5 pins) | 7 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 97.5 |  | °C/W | DBV (SOT-23, 5 pins) | 7 |
| Junction-to-board thermal resistance | RθJB |  | 61.7 |  | °C/W | DBV (SOT-23, 5 pins) | 7 |

## CAD (KiCad official)

- Symbol: `TLV333IDBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tlv333idbvr-etched.step` / `tlv333idbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv333idbvr.step` / `tlv333idbvr.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`tlv333idbvr.step`](tlv333idbvr.step) | 85 KB | You want the bare part, or you mark your own boards. |
| [`tlv333idbvr-etched.step`](tlv333idbvr-etched.step) | 2.0 MB | You want the part with `TLV333IDBVR` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 487 faces against 102 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](docs/tlv333idbvr-datasheet.pdf) (36 pp, sha256 `2da625afcbe3977c`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlv333idbvr-datasheet.pdf)