component
TLV3221DCKR
Public Made by Adomby adom
Texas Instruments Integrated Circuits (ICs), 5-TSSOP, SC-70-5, SOT-353. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tlv3221dckr: CAD wording names the Adom_Gen land, not KiCad official
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TLV3221DCKR
Texas Instruments · Integrated Circuits (ICs) · 5-TSSOP, SC-70-5, SOT-353
TLV3221DCKR from Texas Instruments, in a 5-TSSOP, SC-70-5, SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). The symbol is generated from that pin table and the footprint is an Adom_Gen land derived from the manufacturer drawing; the 3D model is generated to fit it.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Comparator output; the TLV322x family (TLV3221) uses an open-drain output that can be pulled up below or beyond the supply voltage. |
| 2 | V- | power_in | Negative supply voltage; the full supply range VS = (V+) - (V-) is 1.8V to 5.5V with absolute maximum 6.5V. |
| 3 | IN+ | input | Non-inverting (+) comparator input; the input voltage range extends from (V-) - 0.2V to (V+) + 0.2V. |
| 4 | IN- | input | Inverting (-) comparator input; the input voltage range extends from (V-) - 0.2V to (V+) + 0.2V, and input currents above 10mA must be limited when signals swing more than 0.5V beyond the rails. |
| 5 | V+ | power_in | Positive supply voltage; the full supply range VS = (V+) - (V-) is 1.8V to 5.5V with absolute maximum 6.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | 5-TSSOP, SC-70-5, SOT-353 |
| Category | Integrated Circuits (ICs) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | -6 | 1 | 6 | mV | VS = 5V, VCM = VS / 2, TA = -40 to 125℃ | 8 |
| Input bias current | IB | 1 | 5 | pA | VS = 5V, VCM = VS / 2 | 8 | |
| Input bias current | IB | 1200 | pA | VS = 5V, VCM = VS / 2, TA = -40 to 125℃ | 8 | ||
| Input offset current | IOS | 0.1 | 2.5 | pA | VS = 5V, VCM = VS / 2 | 8 | |
| Input offset current | IOS | 250 | pA | VS = 5V, VCM = VS / 2, TA = -40 to 125℃ | 8 | ||
| Voltage swing from (V-) | VOL | 120 | 160 | mV | VS = 5V, ISink = 4mA | 8 | |
| Voltage swing from (V-) | VOL | 180 | mV | VS = 5V, ISink = 4mA, -40 to 125C | 8 | ||
| Supply current / Channel (SINGLE and DUAL) | IQ | 42 | 53 | uA | VS = 2.7V and 5V, no load, VID = -0.1V (Output Low), -40 to 125C | 8 | |
| Supply current / Channel (SINGLE) | IQ | 48 | 60 | uA | VS = 2.7V and 5V, no load, VID = +0.1V (Output High), TA = -40 to 125℃ | 8 | |
| Propagation delay time, high to-low | tPHL | 34 | 40 | ns | Midpoint of input to midpoint of output, VOD = 100mV | 9 | |
| Propagation delay time, high to-low | tPHL | 50 | ns | Midpoint of input to midpoint of output, VOD = 100mV, -40 to 125℃ | 9 | ||
| Supply voltage | VS | 1.8 | 5.5 | V | VS = (V+) - (V-) | 6 | |
| Ambient temperature | TA | -40 | 125 | °C | 6 | ||
| Supply voltage | VS | 6.5 | V | VS = (V+) - (V-) | 6 | ||
| Differential input voltage | VID | -6 | 6 | V | 6 | ||
| Output short-circuit current | ISC | -100 | 100 | mA | 6 | ||
| Junction temperature | TJ | 150 | °C | 6 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Human-body model (HBM) ESD | V(ESD) | -2000 | 2000 | V | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 | 6 | |
| Charged-device model (CDM) ESD | V(ESD) | -1000 | 1000 | V | Charged-device model (CDM), per JEDEC specification JESD22-C101 | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 222 | °C/W | DCK (SC70) 5 pins | 7 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 126.2 | °C/W | DCK (SC70) 5 pins | 7 | ||
| Junction-to-board thermal resistance | RθJB | 56.1 | °C/W | DCK (SC70) 5 pins | 7 | ||
| Junction-to-top characterization parameter | ΨJT | 29.6 | °C/W | DCK (SC70) 5 pins | 7 | ||
| Junction-to-board characterization parameter | ΨJB | 56 | °C/W | DCK (SC70) 5 pins | 7 |
CAD (Adom-generated)
- Symbol:
TLV3221DCKR - Footprint:
Adom_Gen:Texas_Instruments_TLV3221 - 3D model: generated to fit the land (STEP)
- 3D model files:
tlv3221dckr-etched.step/tlv3221dckr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv3221dckr.step/tlv3221dckr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
d5b16ee3d60ef441, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: symbol generated from the datasheet pin table; footprint an Adom_Gen land derived from the manufacturer drawing. 3D model generated to fit that land.
# TLV3221DCKR
**Texas Instruments** · Integrated Circuits (ICs) · 5-TSSOP, SC-70-5, SOT-353
TLV3221DCKR from Texas Instruments, in a 5-TSSOP, SC-70-5, SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). The symbol is generated from that pin table and the footprint is an Adom_Gen land derived from the manufacturer drawing; the 3D model is generated to fit it.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Comparator output; the TLV322x family (TLV3221) uses an open-drain output that can be pulled up below or beyond the supply voltage. |
| 2 | V- | power_in | Negative supply voltage; the full supply range VS = (V+) - (V-) is 1.8V to 5.5V with absolute maximum 6.5V. |
| 3 | IN+ | input | Non-inverting (+) comparator input; the input voltage range extends from (V-) - 0.2V to (V+) + 0.2V. |
| 4 | IN- | input | Inverting (-) comparator input; the input voltage range extends from (V-) - 0.2V to (V+) + 0.2V, and input currents above 10mA must be limited when signals swing more than 0.5V beyond the rails. |
| 5 | V+ | power_in | Positive supply voltage; the full supply range VS = (V+) - (V-) is 1.8V to 5.5V with absolute maximum 6.5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | 5-TSSOP, SC-70-5, SOT-353 |
| Category | Integrated Circuits (ICs) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | -6 | 1 | 6 | mV | VS = 5V, VCM = VS / 2, TA = -40 to 125℃ | 8 |
| Input bias current | IB | | 1 | 5 | pA | VS = 5V, VCM = VS / 2 | 8 |
| Input bias current | IB | | | 1200 | pA | VS = 5V, VCM = VS / 2, TA = -40 to 125℃ | 8 |
| Input offset current | IOS | | 0.1 | 2.5 | pA | VS = 5V, VCM = VS / 2 | 8 |
| Input offset current | IOS | | | 250 | pA | VS = 5V, VCM = VS / 2, TA = -40 to 125℃ | 8 |
| Voltage swing from (V-) | VOL | | 120 | 160 | mV | VS = 5V, ISink = 4mA | 8 |
| Voltage swing from (V-) | VOL | | | 180 | mV | VS = 5V, ISink = 4mA, -40 to 125C | 8 |
| Supply current / Channel (SINGLE and DUAL) | IQ | | 42 | 53 | uA | VS = 2.7V and 5V, no load, VID = -0.1V (Output Low), -40 to 125C | 8 |
| Supply current / Channel (SINGLE) | IQ | | 48 | 60 | uA | VS = 2.7V and 5V, no load, VID = +0.1V (Output High), TA = -40 to 125℃ | 8 |
| Propagation delay time, high to-low | tPHL | | 34 | 40 | ns | Midpoint of input to midpoint of output, VOD = 100mV | 9 |
| Propagation delay time, high to-low | tPHL | | | 50 | ns | Midpoint of input to midpoint of output, VOD = 100mV, -40 to 125℃ | 9 |
| Supply voltage | VS | 1.8 | | 5.5 | V | VS = (V+) - (V-) | 6 |
| Ambient temperature | TA | -40 | | 125 | °C | | 6 |
| Supply voltage | VS | | | 6.5 | V | VS = (V+) - (V-) | 6 |
| Differential input voltage | VID | -6 | | 6 | V | | 6 |
| Output short-circuit current | ISC | -100 | | 100 | mA | | 6 |
| Junction temperature | TJ | | | 150 | °C | | 6 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 6 |
| Human-body model (HBM) ESD | V(ESD) | -2000 | | 2000 | V | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 | 6 |
| Charged-device model (CDM) ESD | V(ESD) | -1000 | | 1000 | V | Charged-device model (CDM), per JEDEC specification JESD22-C101 | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 222 | | °C/W | DCK (SC70) 5 pins | 7 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 126.2 | | °C/W | DCK (SC70) 5 pins | 7 |
| Junction-to-board thermal resistance | RθJB | | 56.1 | | °C/W | DCK (SC70) 5 pins | 7 |
| Junction-to-top characterization parameter | ΨJT | | 29.6 | | °C/W | DCK (SC70) 5 pins | 7 |
| Junction-to-board characterization parameter | ΨJB | | 56 | | °C/W | DCK (SC70) 5 pins | 7 |
## CAD (Adom-generated)
- Symbol: `TLV3221DCKR`
- Footprint: `Adom_Gen:Texas_Instruments_TLV3221`
- 3D model: generated to fit the land (STEP)
- 3D model files: `tlv3221dckr-etched.step` / `tlv3221dckr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv3221dckr.step` / `tlv3221dckr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv3221.pdf) (41 pp, sha256 `d5b16ee3d60ef441`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** symbol generated from the datasheet pin table; footprint an Adom_Gen land derived from the manufacturer drawing. 3D model generated to fit that land.
[Datasheet PDF](docs/tlv3221dckr-datasheet.pdf)