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TLV320AIC3254IRHBR

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Texas Instruments Audio Interface ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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TLV320AIC3254IRHBR

Texas Instruments · Audio Interface ICs · QFN-32-EP(5x5)

TLV320AIC3254IRHBR from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MCLK input Master clock input; supports up to 50 MHz when DVDD ≥ 1.65V or 25 MHz when DVDD ≥ 1.26V.
2 BCLK bidirectional Bidirectional audio serial data bus (primary) bit clock; configurable for master or slave modes.
3 WCLK bidirectional Bidirectional audio serial data bus (primary) word clock; configurable for master or slave modes.
4 DIN/MFP1 input Primary function: audio serial data bus data input; secondary functions: digital microphone input or general-purpose input.
5 DOUT/MFP2 output Primary function: audio serial data bus data output; secondary functions: general-purpose output or various clock outputs.
6 IOVDD power_in IO voltage supply input operating from 1.1V to 3.6V.
7 IOVSS power_in IO ground supply.
8 SCLK/MFP3 input SPI serial clock when SPI_Select = 1; I2C interface serial clock when SPI_Select = 0; also configurable for audio interface or microphone clock functions.
9 SCL/SS input I2C interface serial clock when SPI_Select = 0; SPI interface chip-select signal when SPI_Select = 1.
10 SDA/MOSI input I2C interface serial data input when SPI_Select = 0; SPI interface serial data input when SPI_Select = 1.
11 MISO/MFP4 output SPI serial data output when SPI_Select = 1; secondary functions include general-purpose output and various clock outputs.
12 SPI_SELECT input Control mode select pin to choose between SPI (logic 1) and I2C (logic 0) protocols; changing during operation is not recommended.
13 IN1_L input Multifunction analog input for microphone 1 or line 1 left channel (single-ended) or right-channel negative (differential); maximum 0.5 Vrms signal at CM = 0.9V.
14 IN1_R input Multifunction analog input for microphone 1 or line 1 right channel (single-ended) or right-channel positive (differential); maximum 0.5 Vrms signal at CM = 0.9V.
15 IN2_L input Multifunction analog input for microphone 2 or line 2 left channel (single-ended) or left-channel positive (differential); maximum 0.5 Vrms signal at CM = 0.9V.
16 IN2_R input Multifunction analog input for microphone 2 or line 2 right channel (single-ended) or left-channel negative (differential); maximum 0.5 Vrms signal at CM = 0.9V.
17 AVSS power_in Analog ground supply; all grounds must be tied together to prevent voltage differences exceeding 0.2V.
18 REF output Reference voltage output for analog circuits; requires 10 µF external filter capacitor to ground for optimal signal-to-noise ratio.
19 MICBIAS output Programmable microphone bias voltage output; voltage range 1.04V to LDOIN depending on mode selection with up to 3 mA sourcing capability.
20 IN3_L input Multifunction analog input for microphone 3 or line 3 left channel (single-ended) or differential configuration; maximum 0.5 Vrms signal at CM = 0.9V.
21 IN3_R input Multifunction analog input for microphone 3 or line 3 right channel (single-ended) or differential configuration; maximum 0.5 Vrms signal at CM = 0.9V.
22 LOL output Left line output driver capable of driving loads from 0.6 to 10 kΩ with 0.5 Vrms output at CM = 0.9V.
23 LOR output Right line output driver capable of driving loads from 0.6 to 10 kΩ with 0.5 Vrms output at CM = 0.9V.
24 AVDD power_in Analog voltage supply input ranging from 1.5V to 1.95V; functions as power output when internal A-LDO is enabled.
25 HPL output Left headphone output driver supporting single-ended loads of 14.4-16 Ω or differential loads of 24.4-32 Ω; delivers up to 15 mW from AVDD or 64 mW from LDOIN.
26 LDOIN/HPVDD power_in LDO input supply and headphone power supply ranging from 1.9V to 3.6V; supplies internal analog and digital LDOs and headphone amplifiers.
27 HPR output Right headphone output driver supporting single-ended loads of 14.4-16 Ω or differential loads of 24.4-32 Ω; delivers up to 15 mW from AVDD or 64 mW from LDOIN.
28 DVSS power_in Digital ground supply and chip substrate.
29 DVDD power_in Digital voltage supply input ranging from 1.26V to 1.95V when LDO_SELECT = 0; filtering output when LDO_SELECT = 1; PLL requires minimum 1.65V.
30 LDO_SELECT input D-LDO enable control pin; logic 1 enables internal digital low-dropout regulator, logic 0 disables it.
31 RESET input Active-low device reset input; device enters reset state when pin is held low.
32 GPIO/MFP5 bidirectional General-purpose digital input/output pin; alternate functions include CLKOUT output, interrupt outputs, and various audio interface clock outputs.
33 Thermal Pad passive Exposed thermal pad for PCB ground plane connection providing thermal and mechanical performance; not electrically connected to die.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32-EP(5x5)
Category Interface
Pins 33

CAD (KiCad official)

  • Symbol: TLV320AIC3254IRHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tlv320aic3254irhbr-etched.step / tlv320aic3254irhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv320aic3254irhbr.step / tlv320aic3254irhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (54 pp, sha256 2bb645e830942072, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF