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TLV320AIC3111IRHBT

Texas Instruments · Audio Interface ICs · VQFN-32(5x5)

TLV320AIC3111IRHBT from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IOVSS power_in Interface ground; IOVSS must be tied to the common board ground, with grounds not differing by more than 0.2 V.
2 IOVDD power_in Interface (digital I/O) power supply, specified at 1.1 V to 3.6 V referenced to IOVSS.
3 DVDD power_in Digital core power supply, specified at 1.65 V to 1.95 V referenced to DVSS.
4 DOUT output Audio serial data output.
5 DIN input Audio serial data input.
6 WCLK bidirectional Audio serial word clock, configurable as input to or output from the codec.
7 BCLK bidirectional Audio serial bit clock, configurable as input to or output from the codec.
8 MCLK input External master clock input; maximum master clock frequency is 50 MHz when IOVDD = 3.3 V.
9 SDA bidirectional I2C control bus data line, open-drain; the device acts only as an I2C slave at address 0011 000 with SCL up to 400 kHz.
10 SCL bidirectional I2C control bus clock input, specified up to 400 kHz.
11 VOL/MICDET input Volume control or microphone detection input; as a volume control, the input voltage range is 0 V to 0.5 × AVDD.
12 MICBIAS output Microphone bias voltage output.
13 MIC1LP input Microphone/line input routed to the P input mixer and the left output mixer.
14 MIC1RP input Microphone/line input routed to the P input mixer and the left/right output mixers.
15 MIC1LM input Microphone/line input routed to the M or P input mixer.
16 AVSS power_in Analog ground.
17 AVDD power_in Analog power supply, specified at 2.7 V to 3.6 V referenced to AVSS (3.3 V nominal).
18 DVSS power_in Digital ground.
19 SPLM output Left-channel class-D speaker driver inverting output.
20 SPLVSS power_in Left-channel class-D speaker driver power supply ground.
21 SPLVDD power_in Left-channel class-D speaker driver power supply, specified at 2.7 V to 5.5 V and should not be below AVDD.
22 SPLP output Left-channel class-D speaker driver noninverting output.
23 SPRM output Right-channel class-D speaker driver inverting output.
24 SPRVDD power_in Right-channel class-D speaker driver power supply, specified at 2.7 V to 5.5 V and should not be below AVDD.
25 SPRVSS power_in Right-channel class-D speaker driver power supply ground.
26 SPRP output Right-channel class-D speaker driver noninverting output.
27 HPL output Left-channel headphone/line driver output.
28 HPVDD power_in Headphone/line driver and PLL power supply, specified at 2.7 V to 3.6 V referenced to HPVSS.
29 HPVSS power_in Headphone/line driver and PLL ground.
30 HPR output Right-channel headphone/line driver output.
31 RESET input Device reset input.
32 GPIO1 bidirectional General-purpose input/output and multifunction pin.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32(5x5)
Category Interface
Pins 33

CAD (KiCad official)

  • Symbol: TLV320AIC3111IRHBT
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: tlv320aic3111irhbt-etched.step / tlv320aic3111irhbt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv320aic3111irhbt.step / tlv320aic3111irhbt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (159 pp, sha256 8748de1c923d3549, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF