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TLV320AIC3101IRHBR

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Texas Instruments Audio Interface ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TLV320AIC3101IRHBR

Texas Instruments · Audio Interface ICs · QFN-32-EP(5x5)

TLV320AIC3101IRHBR from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MCLK input Master clock input accepting frequencies from 512 kHz to 50 MHz for all ADC and DAC sampling rate generation.
2 BCLK bidirectional Audio serial data bus bit clock, configurable as input (slave mode) or output (master mode), supporting I2S, left/right-justified, DSP, and TDM transfer modes.
3 WCLK bidirectional Audio serial data bus word clock, configurable as input (slave mode) or output (master mode), defining frame synchronization for audio data transfer.
4 DIN input Audio serial data bus data input supporting 16/20/24/32-bit audio data word lengths at sample rates from 8 kHz to 96 kHz.
5 DOUT output Audio serial data bus data output supporting 16/20/24/32-bit audio data word lengths at sample rates from 8 kHz to 96 kHz, with optional high-impedance state during inactive time slots.
6 DVSS power_in Digital core and digital I/O ground supply connection at 0 V reference potential.
7 IOVDD power_in Digital I/O voltage supply accepting 1.1 V to 3.6 V to power digital input/output buffers and I2C interface logic.
8 SCL bidirectional I2C serial clock input/output, supporting standard (100 kHz) and fast (400 kHz) I2C modes with 7-bit slave device addressing.
9 SDA bidirectional I2C serial data input/output, supporting standard and fast I2C modes for all register read/write operations and device control.
10 MIC1LP/LINE1LP input Configurable analog input for left channel microphone or line input, supporting single-ended mode or positive terminal of fully differential pair with MIC1LM/LINE1LM.
11 MIC1LM/LINE1LM input Fully differential analog input negative terminal for left channel, paired with MIC1LP/LINE1LP, supporting only differential input configuration.
12 MIC1RP/LINE1RP input Configurable analog input for right channel microphone or line input, supporting single-ended mode or positive terminal of fully differential pair with MIC1RM/LINE1RM.
13 MIC1RM/LINE1RM input Fully differential analog input negative terminal for right channel, paired with MIC1RP/LINE1RP, supporting only differential input configuration.
14 MIC2L/LINE2L/MICDET input Configurable analog input for left channel microphone or line input, supporting microphone insertion detection through integrated headset detection circuit.
15 MICBIAS output Programmable microphone bias output voltage selectable as 2.0 V, 2.5 V, or AVDD connection, with 4 mA current sourcing capability.
16 MIC2R/LINE2R input Configurable analog input for right channel microphone or line input with programmable input gain control and mixing capability.
17 AVSS1 power_in Analog ADC ground supply connection at 0 V reference potential for analog-to-digital converter input circuits.
18 DRVDD power_in Analog ADC and output driver voltage supply accepting 2.7 V to 3.6 V for mixed-signal and power amplifier circuits (first connection).
19 HPLOUT output High-power output driver left channel positive terminal, configurable for single-ended, differential, or bridge-terminated load speaker drive up to 30 mW at 16 Ω.
20 HPLCOM output High-power output driver left channel negative/complementary terminal, configurable as differential pair with HPLOUT, constant VCM output, or independent single-ended driver.
21 DRVSS power_in Analog output driver ground supply connection at 0 V reference potential; thermal pad must be connected to this ground using multiple vias.
22 HPRCOM output High-power output driver right channel negative/complementary terminal, configurable as differential pair with HPROUT, constant VCM output, independent driver, or external feedback configuration.
23 HPROUT output High-power output driver right channel positive terminal, configurable for single-ended, differential, or bridge-terminated load speaker drive up to 30 mW at 16 Ω.
24 DRVDD power_in Analog output driver voltage supply accepting 2.7 V to 3.6 V for headphone amplifier and output stage circuits (second connection).
25 AVDD power_in Analog DAC voltage supply accepting 2.7 V to 3.6 V for digital-to-analog converter, analog input amplifiers, and bias/reference circuits.
26 AVSS2 power_in Analog DAC ground supply connection at 0 V reference potential for digital-to-analog converter output circuits.
27 LEFT_LOP output Fully differential stereo line output positive terminal for left channel, capable of driving 10 kΩ loads with programmable gain from 0 dB to 9 dB.
28 LEFT_LOM output Fully differential stereo line output negative terminal for left channel, paired with LEFT_LOP, capable of driving 10 kΩ loads.
29 RIGHT_LOP output Fully differential stereo line output positive terminal for right channel, capable of driving 10 kΩ loads with programmable gain from 0 dB to 9 dB.
30 RIGHT_LOM output Fully differential stereo line output negative terminal for right channel, paired with RIGHT_LOP, capable of driving 10 kΩ loads.
31 RESET input Hardware reset input; must be held low for minimum 10 ns after all power supplies reach specified values to initialize registers and enable I2C communication.
32 DVDD power_in Digital core voltage supply accepting 1.525 V to 1.95 V for internal digital logic, ADC, DAC, PLL, and audio processing circuits.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32-EP(5x5)
Category Interface
Pins 33

CAD (KiCad official)

  • Symbol: TLV320AIC3101IRHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tlv320aic3101irhbr-etched.step / tlv320aic3101irhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv320aic3101irhbr.step / tlv320aic3101irhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (99 pp, sha256 4b9d4b2a9c1f508a, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF