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TLV320AIC20CPFB

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Texas Instruments Audio Interface ICs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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TLV320AIC20CPFB

Texas Instruments · Audio Interface ICs · TQFP-48(7x7)

TLV320AIC20CPFB from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HDSI- input Head-set differential input signal (negative terminal) that can be treated similar to line-input pins.
2 HDSI+ input Head-set differential input signal (positive terminal) that can be treated similar to line-input pins.
3 HDSO- output Head-set differential output signal (negative terminal) with 150Ω load impedance.
4 HDSO+ output Head-set differential output signal (positive terminal) with 150Ω load impedance.
5 AVDD2 power_in Analog power supply pin with recommended operating range of 2.7V to 3.6V.
6 AVSS2 power_in Analog ground reference connection.
7 TESTP input Test pin that should be connected to digital ground.
8 NC unconnected Not connected internally.
9 PWRDN input Power-down mode control input.
10 SDA bidirectional I2C/S2C serial data input/output line.
11 SCL input I2C/S2C serial clock input.
12 IOVDD power_in Digital I/O power supply with recommended operating range of 1.1V to 3.6V.
13 IOVSS power_in Digital I/O ground reference connection.
14 FSD output Frame synchronization signal delayed output.
15 DVDD power_in Digital core power supply with recommended operating range of 1.65V to 1.95V (1.8V nominal).
16 DVSS power_in Digital core ground reference connection.
17 DOUT output Serial port data output.
18 DIN input Serial port data input.
19 FS bidirectional Frame synchronization signal input/output.
20 SCLK bidirectional Serial port bit clock input/output.
21 M/S input Master/slave mode select input applied to CODEC1 only; CODEC2 is always a slave.
22 MCLK input Master clock input with maximum frequency of 100MHz.
23 RESET input Asynchronous reset input.
24 VSS power_in Device ground reference that should typically be connected to analog ground.
25 DRVSS1 power_in Analog output driver stage ground reference connection.
26 SPKO+ output Speaker differential output signal (positive terminal) with 8Ω load impedance.
27 DRVDD power_in Analog output driver power supply with recommended operating range of 2.7V to 3.6V.
28 SPKO- output Speaker differential output signal (negative terminal) with 8Ω load impedance.
29 DRVSS2 power_in Analog output driver stage ground reference connection.
30 CIDI- input Caller-ID differential input signal (negative terminal) that can be treated similar to line-input pins.
31 CIDI+ input Caller-ID differential input signal (positive terminal) that can be treated similar to line-input pins.
32 AVSS1 power_in Analog ground reference connection.
33 AVDD1 power_in Analog power supply pin with recommended operating range of 2.7V to 3.6V.
34 MICI- input Microphone differential input signal (negative terminal).
35 MICI+ input Microphone differential input signal (positive terminal).
36 MICBIAS input Microphone bias voltage output for external microphone impedance.
37 LCDAC output 6-bit digital-to-analog converter output for LCD display control.
38 HNSO- output Hand-set speaker differential output signal (negative terminal) with 150Ω load impedance.
39 HNSO+ output Hand-set speaker differential output signal (positive terminal) with 150Ω load impedance.
40 HNSI- input Hand-set differential input signal (negative terminal) that can be treated similar to line-input pins.
41 HNSI+ input Hand-set differential input signal (positive terminal) that can be treated similar to line-input pins.
42 AVDD power_in Analog power supply pin with recommended operating range of 2.7V to 3.6V.
43 AVSS power_in Analog ground reference connection.
44 LINEI+ input Line differential input signal (positive terminal).
45 LINEI- input Line differential input signal (negative terminal).
46 LINEO- output Line differential output signal (negative terminal) with 600Ω load impedance.
47 LINEO+ output Line differential output signal (positive terminal) with 600Ω load impedance.
48 NC unconnected Not connected internally.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-48(7x7)
Category Interface
Pins 48

CAD (KiCad official)

  • Symbol: TLV320AIC20CPFB
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: tlv320aic20cpfb-etched.step / tlv320aic20cpfb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv320aic20cpfb.step / tlv320aic20cpfb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (59 pp, sha256 7a5a9cd5d93147bf, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF