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TLV320AIC10IPFB

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Texas Instruments Audio Interface ICs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TLV320AIC10IPFB

Texas Instruments · Audio Interface ICs · TQFP-48(7x7)

TLV320AIC10IPFB from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AURXFP input Receiver-path amplifier A1 feedback, or noninverting input to the auxiliary analog input; connect to AVSS if not used.
2 AURXM input Receiver-path amplifier A1 inverting input, or inverting input to the auxiliary analog input; connect to AVSS if not used.
3 AURXCP input Receiver-path/GP amplifier noninverting input; connect to AVSS if not used.
4 DTXOP output Transmitter-path amplifier A3 feedback for the positive output; can also be used for the negative output.
5 DTXOM output Transmitter-path amplifier A4 feedback for the negative output; can also be used for general-purpose amplification.
6 DTXIP input Transmitter-path amplifier A4 analog noninverting input; can also be used for general-purpose amplification.
7 DTXIM input Transmitter-path amplifier A3 analog inverting input; can also be used for general-purpose amplification.
8 OUTP output DAC noninverting output; can also be used alone for single-ended operation.
9 OUTM output DAC inverting output, functionally identical with and complementary to OUTP.
10 M0 input Combined with M1 to select the serial interface mode (frame-sync mode).
11 M1 input Combined with M0 to select the serial interface mode (frame-sync mode).
12 PWRDWN input When pulled low the device enters power-down with the serial interface disabled and most high-speed clocks off; register contents are kept and full operation resumes without reinitialization when pulled high.
13 RESET input Initializes all internal registers to their default values; all RESET pins of cascaded devices must be tied together.
14 DVSS power_in Digital ground.
15 DVDD1 power_in Digital power supply.
16 DOUT output Data output that transmits the ADC output bits and register data, synchronized to SCLK and FS; data is sent on the rising edge of SCLK when FS is low and is high impedance when FS is not activated.
17 DIN input Data input that receives DAC input data and register data from the DSP, synchronized to SCLK and FS; data is latched on the falling edge of SCLK when FS is low and is high impedance when FS is not activated.
18 NC unconnected No connection; leave unconnected.
19 SCLK bidirectional Shift clock for DIN and DOUT during the frame-sync interval; an output at 256x FS (512x for more than 4 cascaded devices) when M/S is high, and an input synchronous to MCLK and FS when M/S is low.
20 MCLK input Master clock that derives the internal clocks of the sigma-delta analog interface circuit.
21 FSD output Frame-sync delayed output that synchronizes a slave device to the master frame sync; requires a pullup resistor if not used.
22 FS bidirectional Frame sync: a falling edge starts DIN reception and DOUT transmission; internally generated and low during data transfer in master mode, externally generated in slave mode.
23 FLAG output Outputs the communication flag (low for primary, high for secondary communication) when D4 of control register 3 is 0, or the value of D3 when D4 is 1.
24 FC input Hardware request for secondary communication; tie low if not used.
25 DCSI input Direct configuration serial input for directly programming the internal control registers; tie high if not used.
26 ALTIN input Serial input in event monitor mode; tie low if not used.
27 M/S input Master/slave select: high selects master operation, low selects slave operation.
28 NC unconnected No connection; leave unconnected.
29 DVSS power_in Digital ground.
30 DVDD2 power_in Digital power supply.
31 NC unconnected No connection; leave unconnected.
32 NC unconnected No connection; leave unconnected.
33 AVSS power_in Analog ground.
34 AVDD2 power_in Analog power supply.
35 NC unconnected No connection; leave unconnected.
36 NC unconnected No connection; leave unconnected.
37 NC unconnected No connection; leave unconnected.
38 FILT output Bandgap filter that provides 2.5 V for decoupling the bandgap reference; the optimal capacitor is 0.1 µF ceramic and the node should be loaded only with a high-impedance dc load.
39 NC unconnected No connection; leave unconnected.
40 AVSS power_in Analog ground.
41 NC unconnected No connection; leave unconnected.
42 AVSS power_in Analog ground.
43 VMID output Reference voltage output at AVDD/2.
44 NC unconnected No connection; leave unconnected.
45 AVDD1 power_in Analog power supply.
46 AVSS power_in Analog ground.
47 INP input Noninverting input to the analog modulator; requires an external R-C antialias filter with low output impedance if the internal antialias filter is bypassed.
48 INM input Inverting input to the analog modulator; requires an external R-C antialias filter with low output impedance if the internal antialias filter is bypassed.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-48(7x7)
Category Interface
Pins 48

CAD (KiCad official)

  • Symbol: TLV320AIC10IPFB
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: tlv320aic10ipfb-etched.step / tlv320aic10ipfb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv320aic10ipfb.step / tlv320aic10ipfb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (57 pp, sha256 cdec88e7085fb9a1, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF