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TLV320ADC6140IRTWR
Public Made by Adomby adom
Texas Instruments ADCs/DACs - Special Purpose, WQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV320ADC6140IRTWR
Texas Instruments · ADCs/DACs - Special Purpose · WQFN-24(4x4)
TLV320ADC6140IRTWR from Texas Instruments, in a WQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Analog power supply, 1.8 V or 3.3 V nominal; 3.0 V to 3.6 V for 3.3 V operation and 1.7 V to 1.9 V for 1.8 V operation. |
| 2 | AREG | power_out | Analog on-chip regulator output for the analog supply (1.8 V nominal), or an input for external 1.8 V analog power when the internal regulator is shut down. |
| 3 | VREF | power_in | Analog reference voltage filter node; requires a minimum 1-µF capacitor from VREF to AVSS. |
| 4 | AVSS | power_in | Analog ground; short directly to the board ground plane and keep within 0.2 V of VSS (thermal pad). |
| 5 | MICBIAS | output | Microphone bias output; the level is set by MBIAS_VAL to VREF, VREF x 1.096, or AVDD. |
| 6 | IN1P_GPI1 | passive | Analog input 1P or general-purpose digital input 1; voltage range is -0.3 V to AVDD + 0.3 V relative to VSS (thermal pad). |
| 7 | IN1M_GPO1 | passive | Analog input 1M or general-purpose digital output 1 (also used for PDM clock or interrupt); analog input voltage range is -0.3 V to AVDD + 0.3 V relative to AVSS. |
| 8 | IN2P_GPI2 | passive | Analog input 2P or general-purpose digital input 2; voltage range is -0.3 V to AVDD + 0.3 V relative to VSS (thermal pad). |
| 9 | IN2M_GPO2 | passive | Analog input 2M or general-purpose digital output 2 (also used for PDM clock or interrupt); analog input voltage range is -0.3 V to AVDD + 0.3 V relative to AVSS. |
| 10 | IN3P_GPI3 | passive | Analog input 3P or general-purpose digital input 3; voltage range is -0.3 V to AVDD + 0.3 V relative to VSS (thermal pad). |
| 11 | IN3M_GPO3 | passive | Analog input 3M or general-purpose digital output 3 (also used for PDM clock or interrupt); analog input voltage range is -0.3 V to AVDD + 0.3 V relative to AVSS. |
| 12 | IN4P_GPI4 | passive | Analog input 4P or general-purpose digital input 4; voltage range is -0.3 V to AVDD + 0.3 V relative to VSS (thermal pad). |
| 13 | IN4M_GPO4 | passive | Analog input 4M or general-purpose digital output 4 (also used for PDM clock or interrupt); analog input voltage range is -0.3 V to AVDD + 0.3 V relative to AVSS. |
| 14 | SHDNZ | input | Device hardware shutdown and reset, active low; digital input referenced to IOVDD (maximum IOVDD + 0.3 V). |
| 15 | ADDR1_MISO | bidirectional | In I2C mode, I2C slave address A1 pin; in SPI mode, SPI slave output pin. |
| 16 | ADDR0_SCLK | input | In I2C mode, I2C slave address A0 pin; in SPI mode, SPI serial bit clock input. |
| 17 | SCL_MOSI | input | In I2C mode, clock pin for the I2C control bus; in SPI mode, SPI slave input pin. |
| 18 | SDA_SSZ | bidirectional | In I2C mode, data pin for the I2C control bus; in SPI mode, SPI slave-select pin. |
| 19 | IOVDD | power_in | Digital I/O power supply, 1.8 V or 3.3 V nominal; 3.0 V to 3.6 V for 3.3 V operation and 1.65 V to 1.95 V for 1.8 V operation. |
| 20 | GPIO1 | bidirectional | General-purpose digital input/output 1, referenced to IOVDD; multipurpose functions include PDM microphone clock or data, PLL input clock source, and interrupt output. |
| 21 | SDOUT | output | Audio serial data interface bus output. |
| 22 | BCLK | bidirectional | Audio serial data interface bit clock. |
| 23 | FSYNC | bidirectional | Audio serial data interface frame synchronization signal. |
| 24 | DREG | power_out | Digital regulator output for the digital core supply, 1.5 V nominal. |
| 25 | VSS | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24(4x4) |
| Category | Data Acquisition |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
TLV320ADC6140IRTWR - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: WQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
tlv320adc6140irtwr-etched.step/tlv320adc6140irtwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv320adc6140irtwr.step/tlv320adc6140irtwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (122 pp, sha256
f49753c9e81160c6, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).