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TLV2784AIDR

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Texas Instruments Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV2784AIDR

Texas Instruments · Operational Amplifier · SOIC-14

TLV2784AIDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 rail-to-rail output, with output current limited to ±10 mA absolute maximum.
2 1IN− input Channel 1 inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
3 1IN+ input Channel 1 non-inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
4 VDD power_in Positive supply, recommended 1.8 V to 3.6 V single supply (±0.9 V to ±1.8 V split) with 4 V absolute maximum.
5 2IN+ input Channel 2 non-inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
6 2IN− input Channel 2 inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
7 2OUT output Channel 2 rail-to-rail output, with output current limited to ±10 mA absolute maximum.
8 3OUT output Channel 3 rail-to-rail output, with output current limited to ±10 mA absolute maximum.
9 3IN− input Channel 3 inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
10 3IN+ input Channel 3 non-inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
11 GND power_in Negative supply/ground reference; all voltage values except differential voltages are with respect to GND.
12 4IN+ input Channel 4 non-inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
13 4IN− input Channel 4 inverting input, with common-mode range of −0.2 V to VDD+0.2 V.
14 4OUT output Channel 4 rail-to-rail output, with output current limited to ±10 mA absolute maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VDD (single supply) VDD 1.8 3.6 V Single supply 4
Common-mode input voltage range VICR -0.2 V Upper limit printed as VDD+0.2 4
Operating free-air temperature, I-suffix TA -40 125 °C I-suffix 4
Supply voltage, VDD VDD 4 V Voltages referenced to GND (Note 1) 4
Input current, any input II -10 10 mA Any input 4
Output current IO -10 10 mA 4
Maximum junction temperature TJ 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Thermal resistance, junction-to-ambient, D (14) package θJA 122.3 °C/W D (14) package, from dissipation rating table 4
Input offset voltage, 25°C VIO 250 2000 µV VO=VDD/2, RL=2 kΩ, RS=50 Ω, TA=25°C; TLV278xA 5
Input offset voltage, full range VIO 3000 µV VO=VDD/2, RL=2 kΩ, RS=50 Ω, full range (−40°C to 125°C); TLV278xA 5
Common-mode rejection ratio, VDD=1.8 V, 25°C CMRR 50 76 dB VIC=0 to VDD, RS=50 Ω, VDD=1.8 V, TA=25°C 5
Common-mode rejection ratio, VDD=1.8 V, full range CMRR 50 dB VIC=0 to VDD, RS=50 Ω, VDD=1.8 V, full range 5
Common-mode rejection ratio, VDD=2.7 V/3.6 V, 25°C CMRR 55 80 dB VIC=0 to VDD, RS=50 Ω, VDD=2.7 V/3.6 V, TA=25°C 5
Common-mode rejection ratio, VDD=2.7 V/3.6 V, full range CMRR 50 dB VIC=0 to VDD, RS=50 Ω, VDD=2.7 V/3.6 V, full range 5
Common-mode rejection ratio, VIC=1.2 V to VDD, 25°C CMRR 70 100 dB VIC=1.2 V to VDD, RS=50 Ω, VDD=2.7 V/3.6 V, TA=25°C 5
Common-mode rejection ratio, VIC=1.2 V to VDD, full range CMRR 70 dB VIC=1.2 V to VDD, RS=50 Ω, VDD=2.7 V/3.6 V, full range 5
Large-signal differential voltage amplification, VDD=1.8 V, 25°C AVD 200 600 V/mV RL=2 kΩ, VDD=1.8 V, TA=25°C 5
Large-signal differential voltage amplification, VDD=1.8 V, full range AVD 50 V/mV RL=2 kΩ, VDD=1.8 V, full range 5
Large-signal differential voltage amplification, VDD=2.7 V/3.6 V, 25°C AVD 200 1000 V/mV RL=2 kΩ, VO(PP)=1 V, VDD=2.7 V/3.6 V, TA=25°C 5
Large-signal differential voltage amplification, VDD=2.7 V/3.6 V, full range AVD 70 V/mV RL=2 kΩ, VO(PP)=1 V, VDD=2.7 V/3.6 V, full range 5
Input offset current, 25°C IIO 2.5 15 pA VIC=VDD/2, VO=VDD/2, RL=2 kΩ, TA=25°C 5
Input offset current, full range (I-suffix) IIO 300 pA VO=VDD/2, RL=2 kΩ, TLV278xI, full range 5
Input bias current, 25°C IIB 2.5 15 pA RS=50 Ω, TA=25°C 5
Input bias current, full range (I-suffix) IIB 300 pA TLV278xI, full range 5
High-level output voltage, VDD=1.8 V, IOH=−1 mA, 25°C VOH 1.7 1.77 V VDD=1.8 V, IOH=−1 mA, TA=25°C 6
High-level output voltage, VDD=1.8 V, IOH=−1 mA, full range VOH 1.63 V VDD=1.8 V, IOH=−1 mA, full range 6
High-level output voltage, VDD=2.7 V, IOH=−1 mA, 25°C VOH 2.6 2.68 V VDD=2.7 V, IOH=−1 mA, TA=25°C 6
High-level output voltage, VDD=2.7 V, IOH=−1 mA, full range VOH 2.6 V VDD=2.7 V, IOH=−1 mA, full range 6
High-level output voltage, VDD=1.8 V, IOH=−5 mA, 25°C VOH 1.5 1.55 V VDD=1.8 V, IOH=−5 mA, TA=25°C 6
High-level output voltage, VDD=1.8 V, IOH=−5 mA, full range VOH 1.46 V VDD=1.8 V, IOH=−5 mA, full range 6
High-level output voltage, VDD=2.7 V, IOH=−5 mA, 25°C VOH 2.5 2.55 V VDD=2.7 V, IOH=−5 mA, TA=25°C 6
High-level output voltage, VDD=2.7 V, IOH=−5 mA, full range VOH 2.45 V VDD=2.7 V, IOH=−5 mA, full range 6
Low-level output voltage, VDD=1.8 V, IOL=5 mA, 25°C VOL 180 240 mV VDD=1.8 V, IOL=5 mA, TA=25°C 6
Low-level output voltage, VDD=1.8 V, IOL=5 mA, full range VOL 290 mV VDD=1.8 V, IOL=5 mA, full range 6
Low-level output voltage, VDD=2.7 V, IOL=5 mA, 25°C VOL 120 170 mV VDD=2.7 V, IOL=5 mA, TA=25°C 6
Low-level output voltage, VDD=2.7 V, IOL=5 mA, full range VOL 200 mV VDD=2.7 V, IOL=5 mA, full range 6
Output current, VDD=1.8 V, positive rail IO 10 mA VDD=1.8 V, positive rail 6
Output current, VDD=1.8 V, VO=0.5 V from negative rail, 25°C IO 15 mA VDD=1.8 V, VO=0.5 V from negative rail, TA=25°C 6
Output current, VDD=2.7 V, positive rail, 25°C IO 17 mA VDD=2.7 V, positive rail, TA=25°C 6
Output current, VDD=2.7 V, VO=0.5 V from negative rail IO 23 mA VDD=2.7 V, VO=0.5 V from negative rail 6
Supply current per channel, 25°C IDD 650 770 µA VO=VDD/2, SHDN=VDD, TA=25°C 6
Supply current per channel, full range IDD 820 µA VO=VDD/2, SHDN=VDD, full range 6
Supply voltage rejection ratio, VDD=1.8 V to 2.7 V, 25°C kSVR 60 75 dB VDD=1.8 V to 2.7 V, VIC=VDD/2, no load, TA=25°C 6
Supply voltage rejection ratio, VDD=1.8 V to 2.7 V, full range kSVR 58 dB VDD=1.8 V to 2.7 V, VIC=VDD/2, no load, full range 6
Supply voltage rejection ratio, VDD=2.7 V to 3.6 V, 25°C kSVR 75 90 dB VDD=2.7 V to 3.6 V, VIC=VDD/2, no load, TA=25°C 6
Supply voltage rejection ratio, VDD=2.7 V to 3.6 V, full range kSVR 70 dB VDD=2.7 V to 3.6 V, VIC=VDD/2, no load, full range 6
Positive slew rate at unity gain, VDD=1.8 V, 25°C SR+ 3.3 4.3 V/µs VO(PP)=1 V, RL=2 kΩ, VDD=1.8 V, TA=25°C 7
Positive slew rate at unity gain, VDD=1.8 V, full range SR+ 3.1 V/µs VO(PP)=1 V, RL=2 kΩ, VDD=1.8 V, full range 7
Positive slew rate at unity gain, VDD=2.7 V, 25°C SR+ 3.8 4.8 V/µs VO(PP)=1 V, RL=2 kΩ, VDD=2.7 V, TA=25°C 7
Positive slew rate at unity gain, VDD=2.7 V, full range SR+ 3.5 V/µs RL=2 kΩ, CL=50 pF, VDD=2.7 V, full range 7
Positive slew rate at unity gain, VDD=3.6 V, 25°C SR+ 4 5 V/µs CL=50 pF, VDD=3.6 V, TA=25°C 7
Positive slew rate at unity gain, VDD=3.6 V, full range SR+ 3.6 V/µs CL=50 pF, VDD=3.6 V, full range 7
Negative slew rate at unity gain, VDD=1.8 V, 25°C SR− 2.1 2.8 V/µs VO(PP)=1 V, RL=2 kΩ, VDD=1.8 V, TA=25°C 7
Negative slew rate at unity gain, VDD=1.8 V, full range SR− 1.89 V/µs VO(PP)=1 V, RL=2 kΩ, VDD=1.8 V, full range 7
Negative slew rate at unity gain, VDD=2.7 V, 25°C SR− 2.2 2.8 V/µs VO(PP)=1 V, RL=2 kΩ, VDD=2.7 V, TA=25°C 7
Negative slew rate at unity gain, VDD=2.7 V, full range SR− 1.97 V/µs RL=2 kΩ, CL=50 pF, VDD=2.7 V, full range 7
Negative slew rate at unity gain, VDD=3.6 V, 25°C SR− 3.5 4.2 V/µs CL=50 pF, VDD=3.6 V, TA=25°C 7
Negative slew rate at unity gain, VDD=3.6 V, full range SR− 3.4 V/µs CL=50 pF, VDD=3.6 V, full range 7

CAD (KiCad official)

  • Symbol: TLV2784AIDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tlv2784aidr-etched.step / tlv2784aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2784aidr.step / tlv2784aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (53 pp, sha256 982e7eb9f1759dba, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF