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Ray tlv272id: specified limits as data (metadata.characteristics, 60 rows from the datasheet) 2589f87 14d ago

TLV272ID

Texas Instruments · Operational Amplifier · SOIC-8

TLV272ID from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OUT	output	Output of channel 1, rail-to-rail output; absolute maximum output current is ±100 mA (IO −100 to 100 mA).
2	1IN-	input	Inverting input of channel 1; input voltage is limited to −0.2 V to VDD + 0.2 V and input current to ±10 mA (absolute maximum).
3	1IN+	input	Noninverting input of channel 1; common-mode input voltage range is 0 V to VDD − 1.35 V.
4	GND	power_in	Negative (lowest) supply or ground, used for single-supply operation.
5	2IN+	input	Noninverting input of channel 2; common-mode input voltage range is 0 V to VDD − 1.35 V.
6	2IN-	input	Inverting input of channel 2; input voltage is limited to −0.2 V to VDD + 0.2 V and input current to ±10 mA (absolute maximum).
7	2OUT	output	Output of channel 2, rail-to-rail output; absolute maximum output current is ±100 mA (IO −100 to 100 mA).
8	VDD	power_in	Positive (highest) supply; single-supply range 2.7 V to 16 V (absolute maximum 16.5 V), or split-supply ±1.35 V to ±8 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Amplifiers/Comparators
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input offset voltage, 25°C	VIO		0.5	5	mV	VIC = VDD/2, RL = 10 kΩ, VO = VDD/2, RS = 50 Ω	8
Input offset voltage, full range	VIO			7	mV	Full range; VIC = VDD/2, RL = 10 kΩ, VO = VDD/2, RS = 50 Ω	8
Common-mode rejection ratio, VDD = 2.7 V, 25°C	CMRR	58	70		dB	VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 2.7 V	8
Common-mode rejection ratio, VDD = 2.7 V, full range	CMRR	55			dB	Full range; VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 2.7 V	8
Common-mode rejection ratio, VDD = 5 V, 25°C	CMRR	65	80		dB	VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 5 V	8
Common-mode rejection ratio, VDD = 5 V, full range	CMRR	62			dB	Full range; VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 5 V	8
Common-mode rejection ratio, VDD = ±5 V, 25°C	CMRR	69	85		dB	VIC = –5 V to VDD − 1.35 V, RS = 50 Ω, VDD = ±5 V	8
Common-mode rejection ratio, VDD = ±5 V, full range	CMRR	66			dB	Full range; VIC = –5 V to VDD − 1.35 V, RS = 50 Ω, VDD = ±5 V	8
Large-signal differential voltage amplification, VDD = 2.7 V, 25°C	AVD	97	106		dB	VO(PP) = VDD/2, RL = 10 kΩ, VDD = 2.7 V	8
Large-signal differential voltage amplification, VDD = 2.7 V, full range	AVD	76			dB	Full range; VO(PP) = VDD/2, RL = 10 kΩ, VDD = 2.7 V	8
Large-signal differential voltage amplification, VDD = 5 V, 25°C	AVD	100	110		dB	VO(PP) = VDD/2, RL = 10 kΩ, VDD = 5 V	8
Large-signal differential voltage amplification, VDD = 5 V, full range	AVD	86			dB	Full range; VO(PP) = VDD/2, RL = 10 kΩ, VDD = 5 V	8
Large-signal differential voltage amplification, VDD = ±5 V, 25°C	AVD	100	115		dB	VO(PP) = VDD/2, RL = 10 kΩ, VDD = ±5 V	8
Large-signal differential voltage amplification, VDD = ±5 V, full range	AVD	90			dB	Full range; VO(PP) = VDD/2, RL = 10 kΩ, VDD = ±5 V	8
Input offset current, 25°C	IIO		1	60	pA	VDD = 5 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω	8
Input bias current, 25°C	IIB		1	60	pA	VDD = 5 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω	8
High-level output voltage, VDD = 2.7 V, IOH = −1 mA, 25°C	VOH	2.55	2.58		V	VIC = VDD/2, IOH = –1 mA, VDD = 2.7 V	9
High-level output voltage, VDD = 2.7 V, IOH = −1 mA, full range	VOH	2.48			V	Full range; VIC = VDD/2, IOH = –1 mA, VDD = 2.7 V	9
High-level output voltage, VDD = 5 V, IOH = −1 mA, 25°C	VOH	4.9	4.93		V	VIC = VDD/2, IOH = –1 mA, VDD = 5 V	9
High-level output voltage, VDD = 5 V, IOH = −1 mA, full range	VOH	4.85			V	Full range; VIC = VDD/2, IOH = –1 mA, VDD = 5 V	9
High-level output voltage, VDD = ±5 V, IOH = −1 mA, 25°C	VOH	4.92	4.96		V	VIC = VDD/2, IOH = –1 mA, VDD = ±5 V	9
High-level output voltage, VDD = ±5 V, IOH = −1 mA, full range	VOH	4.9			V	Full range; VIC = VDD/2, IOH = –1 mA, VDD = ±5 V	9
High-level output voltage, VDD = 2.7 V, IOH = −5 mA, 25°C	VOH	1.9	2.1		V	VIC = VDD/2, IOH = –5 mA, VDD = 2.7 V	9
High-level output voltage, VDD = 2.7 V, IOH = −5 mA, full range	VOH	1.5			V	Full range; VIC = VDD/2, IOH = –5 mA, VDD = 2.7 V	9
High-level output voltage, VDD = 5 V, IOH = −5 mA, 25°C	VOH	4.6	4.68		V	VIC = VDD/2, IOH = –5 mA, VDD = 5 V	9
High-level output voltage, VDD = 5 V, IOH = −5 mA, full range	VOH	4.5			V	Full range; VIC = VDD/2, IOH = –5 mA, VDD = 5 V	9
High-level output voltage, VDD = ±5 V, IOH = −5 mA, 25°C	VOH	4.7	4.84		V	VIC = VDD/2, IOH = –5 mA, VDD = ±5 V	9
High-level output voltage, VDD = ±5 V, IOH = −5 mA, full range	VOH	4.65			V	Full range; VIC = VDD/2, IOH = –5 mA, VDD = ±5 V	9
Low-level output voltage, VDD = 2.7 V, 1 mA, 25°C	VOL		0.1	0.15	V	VIC = VDD/2, IOH = 1 mA, VDD = 2.7 V	9
Low-level output voltage, VDD = 2.7 V, 1 mA, full range	VOL			0.22	V	Full range; VIC = VDD/2, IOH = 1 mA, VDD = 2.7 V	9
Low-level output voltage, VDD = 5 V, 1 mA, 25°C	VOL		0.05	0.1	V	VIC = VDD/2, IOH = 1 mA, VDD = 5 V	9
Low-level output voltage, VDD = 5 V, 1 mA, full range	VOL			0.15	V	Full range; VIC = VDD/2, IOH = 1 mA, VDD = 5 V	9
Low-level output voltage, VDD = ±5 V, 1 mA, 25°C	VOL		-4.95	-4.92	V	VIC = VDD/2, IOH = 1 mA, VDD = ±5 V	9
Low-level output voltage, VDD = ±5 V, 1 mA, full range	VOL			-4.9	V	Full range; VIC = VDD/2, IOH = 1 mA, VDD = ±5 V	9
Low-level output voltage, VDD = 2.7 V, 5 mA, 25°C	VOL		0.5	0.7	V	VIC = VDD/2, IOH = 5 mA, VDD = 2.7 V	9
Low-level output voltage, VDD = 2.7 V, 5 mA, full range	VOL			1.1	V	Full range; VIC = VDD/2, IOH = 5 mA, VDD = 2.7 V	9
Low-level output voltage, VDD = 5 V, 5 mA, 25°C	VOL		0.28	0.4	V	VIC = VDD/2, IOH = 5 mA, VDD = 5 V	9
Low-level output voltage, VDD = 5 V, 5 mA, full range	VOL			0.5	V	Full range; VIC = VDD/2, IOH = 5 mA, VDD = 5 V	9
Low-level output voltage, VDD = ±5 V, 5 mA, 25°C	VOL		-4.84	-4.7	V	VIC = VDD/2, IOH = 5 mA, VDD = ±5 V	9
Low-level output voltage, VDD = ±5 V, 5 mA, full range	VOL			-4.65	V	Full range; VIC = VDD/2, IOH = 5 mA, VDD = ±5 V	9
Supply current per channel, VDD = 2.7 V, 25°C	IDD		470	560	µA	VO = VDD/2, VDD = 2.7 V	10
Supply current per channel, VDD = 5 V, 25°C	IDD		550	660	µA	VO = VDD/2, VDD = 5 V	10
Supply current per channel, VDD = 10 V, 25°C	IDD		625	800	µA	VO = VDD/2, VDD = 10 V	10
Supply current per channel, VDD = 10 V, full range	IDD			1000	µA	Full range; VO = VDD/2, VDD = 10 V	10
Supply voltage rejection ratio, 25°C	PSRR	70	80		dB	VDD = 2.7 V to 16 V, VIC = VDD/2, no load	10
Supply voltage rejection ratio, full range	PSRR	65			dB	Full range; VDD = 2.7 V to 16 V, VIC = VDD/2, no load	10
Slew rate at unity gain, VDD = 2.7 V, 25°C	SR	1.35	2.1		V/µs	VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 2.7 V	10
Slew rate at unity gain, VDD = 2.7 V, full range	SR	1			V/µs	Full range; VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 2.7 V	10
Slew rate at unity gain, VDD = 5 V, 25°C	SR	1.45	2.4		V/µs	VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 5 V	10
Slew rate at unity gain, VDD = 5 V, full range	SR	1.2			V/µs	Full range; VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 5 V	10
Slew rate at unity gain, VDD = ±5 V, 25°C	SR	1.8	2.6		V/µs	VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = ±5 V	10
Slew rate at unity gain, VDD = ±5 V, full range	SR	1.3			V/µs	Full range; VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = ±5 V	10
Supply voltage, single-supply	VDD	2.7		16	V		6
Supply voltage, split-supply	VDD	1.35		8	V	Split supply ±1.35 V to ±8 V	6
Common-mode input voltage	VICR	0			V		6
Operating free-air temperature, I-suffix	TA	-40		125	°C	I-suffix	6
Supply voltage, absolute maximum	VDD			16.5	V		6
Input voltage, absolute maximum	VI	-0.2			V		6
Input current, absolute maximum	II	-10		10	mA		6
Output current, absolute maximum	IO	-100		100	mA		6

CAD (KiCad official)

Symbol: TLV272ID
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tlv272id-etched.step / tlv272id-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv272id.step / tlv272id.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (50 pp, sha256 878af99f3ea8d34e, retrieved 2026-10-11, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TLV272ID

**Texas Instruments** · Operational Amplifier · SOIC-8

TLV272ID from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of channel 1, rail-to-rail output; absolute maximum output current is ±100 mA (IO −100 to 100 mA). |
| 2 | 1IN- | input | Inverting input of channel 1; input voltage is limited to −0.2 V to VDD + 0.2 V and input current to ±10 mA (absolute maximum). |
| 3 | 1IN+ | input | Noninverting input of channel 1; common-mode input voltage range is 0 V to VDD − 1.35 V. |
| 4 | GND | power_in | Negative (lowest) supply or ground, used for single-supply operation. |
| 5 | 2IN+ | input | Noninverting input of channel 2; common-mode input voltage range is 0 V to VDD − 1.35 V. |
| 6 | 2IN- | input | Inverting input of channel 2; input voltage is limited to −0.2 V to VDD + 0.2 V and input current to ±10 mA (absolute maximum). |
| 7 | 2OUT | output | Output of channel 2, rail-to-rail output; absolute maximum output current is ±100 mA (IO −100 to 100 mA). |
| 8 | VDD | power_in | Positive (highest) supply; single-supply range 2.7 V to 16 V (absolute maximum 16.5 V), or split-supply ±1.35 V to ±8 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage, 25°C | VIO |  | 0.5 | 5 | mV | VIC = VDD/2, RL = 10 kΩ, VO = VDD/2, RS = 50 Ω | 8 |
| Input offset voltage, full range | VIO |  |  | 7 | mV | Full range; VIC = VDD/2, RL = 10 kΩ, VO = VDD/2, RS = 50 Ω | 8 |
| Common-mode rejection ratio, VDD = 2.7 V, 25°C | CMRR | 58 | 70 |  | dB | VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 2.7 V | 8 |
| Common-mode rejection ratio, VDD = 2.7 V, full range | CMRR | 55 |  |  | dB | Full range; VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 2.7 V | 8 |
| Common-mode rejection ratio, VDD = 5 V, 25°C | CMRR | 65 | 80 |  | dB | VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 5 V | 8 |
| Common-mode rejection ratio, VDD = 5 V, full range | CMRR | 62 |  |  | dB | Full range; VIC = 0 to VDD − 1.35 V, RS = 50 Ω, VDD = 5 V | 8 |
| Common-mode rejection ratio, VDD = ±5 V, 25°C | CMRR | 69 | 85 |  | dB | VIC = –5 V to VDD − 1.35 V, RS = 50 Ω, VDD = ±5 V | 8 |
| Common-mode rejection ratio, VDD = ±5 V, full range | CMRR | 66 |  |  | dB | Full range; VIC = –5 V to VDD − 1.35 V, RS = 50 Ω, VDD = ±5 V | 8 |
| Large-signal differential voltage amplification, VDD = 2.7 V, 25°C | AVD | 97 | 106 |  | dB | VO(PP) = VDD/2, RL = 10 kΩ, VDD = 2.7 V | 8 |
| Large-signal differential voltage amplification, VDD = 2.7 V, full range | AVD | 76 |  |  | dB | Full range; VO(PP) = VDD/2, RL = 10 kΩ, VDD = 2.7 V | 8 |
| Large-signal differential voltage amplification, VDD = 5 V, 25°C | AVD | 100 | 110 |  | dB | VO(PP) = VDD/2, RL = 10 kΩ, VDD = 5 V | 8 |
| Large-signal differential voltage amplification, VDD = 5 V, full range | AVD | 86 |  |  | dB | Full range; VO(PP) = VDD/2, RL = 10 kΩ, VDD = 5 V | 8 |
| Large-signal differential voltage amplification, VDD = ±5 V, 25°C | AVD | 100 | 115 |  | dB | VO(PP) = VDD/2, RL = 10 kΩ, VDD = ±5 V | 8 |
| Large-signal differential voltage amplification, VDD = ±5 V, full range | AVD | 90 |  |  | dB | Full range; VO(PP) = VDD/2, RL = 10 kΩ, VDD = ±5 V | 8 |
| Input offset current, 25°C | IIO |  | 1 | 60 | pA | VDD = 5 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω | 8 |
| Input bias current, 25°C | IIB |  | 1 | 60 | pA | VDD = 5 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω | 8 |
| High-level output voltage, VDD = 2.7 V, IOH = −1 mA, 25°C | VOH | 2.55 | 2.58 |  | V | VIC = VDD/2, IOH = –1 mA, VDD = 2.7 V | 9 |
| High-level output voltage, VDD = 2.7 V, IOH = −1 mA, full range | VOH | 2.48 |  |  | V | Full range; VIC = VDD/2, IOH = –1 mA, VDD = 2.7 V | 9 |
| High-level output voltage, VDD = 5 V, IOH = −1 mA, 25°C | VOH | 4.9 | 4.93 |  | V | VIC = VDD/2, IOH = –1 mA, VDD = 5 V | 9 |
| High-level output voltage, VDD = 5 V, IOH = −1 mA, full range | VOH | 4.85 |  |  | V | Full range; VIC = VDD/2, IOH = –1 mA, VDD = 5 V | 9 |
| High-level output voltage, VDD = ±5 V, IOH = −1 mA, 25°C | VOH | 4.92 | 4.96 |  | V | VIC = VDD/2, IOH = –1 mA, VDD = ±5 V | 9 |
| High-level output voltage, VDD = ±5 V, IOH = −1 mA, full range | VOH | 4.9 |  |  | V | Full range; VIC = VDD/2, IOH = –1 mA, VDD = ±5 V | 9 |
| High-level output voltage, VDD = 2.7 V, IOH = −5 mA, 25°C | VOH | 1.9 | 2.1 |  | V | VIC = VDD/2, IOH = –5 mA, VDD = 2.7 V | 9 |
| High-level output voltage, VDD = 2.7 V, IOH = −5 mA, full range | VOH | 1.5 |  |  | V | Full range; VIC = VDD/2, IOH = –5 mA, VDD = 2.7 V | 9 |
| High-level output voltage, VDD = 5 V, IOH = −5 mA, 25°C | VOH | 4.6 | 4.68 |  | V | VIC = VDD/2, IOH = –5 mA, VDD = 5 V | 9 |
| High-level output voltage, VDD = 5 V, IOH = −5 mA, full range | VOH | 4.5 |  |  | V | Full range; VIC = VDD/2, IOH = –5 mA, VDD = 5 V | 9 |
| High-level output voltage, VDD = ±5 V, IOH = −5 mA, 25°C | VOH | 4.7 | 4.84 |  | V | VIC = VDD/2, IOH = –5 mA, VDD = ±5 V | 9 |
| High-level output voltage, VDD = ±5 V, IOH = −5 mA, full range | VOH | 4.65 |  |  | V | Full range; VIC = VDD/2, IOH = –5 mA, VDD = ±5 V | 9 |
| Low-level output voltage, VDD = 2.7 V, 1 mA, 25°C | VOL |  | 0.1 | 0.15 | V | VIC = VDD/2, IOH = 1 mA, VDD = 2.7 V | 9 |
| Low-level output voltage, VDD = 2.7 V, 1 mA, full range | VOL |  |  | 0.22 | V | Full range; VIC = VDD/2, IOH = 1 mA, VDD = 2.7 V | 9 |
| Low-level output voltage, VDD = 5 V, 1 mA, 25°C | VOL |  | 0.05 | 0.1 | V | VIC = VDD/2, IOH = 1 mA, VDD = 5 V | 9 |
| Low-level output voltage, VDD = 5 V, 1 mA, full range | VOL |  |  | 0.15 | V | Full range; VIC = VDD/2, IOH = 1 mA, VDD = 5 V | 9 |
| Low-level output voltage, VDD = ±5 V, 1 mA, 25°C | VOL |  | -4.95 | -4.92 | V | VIC = VDD/2, IOH = 1 mA, VDD = ±5 V | 9 |
| Low-level output voltage, VDD = ±5 V, 1 mA, full range | VOL |  |  | -4.9 | V | Full range; VIC = VDD/2, IOH = 1 mA, VDD = ±5 V | 9 |
| Low-level output voltage, VDD = 2.7 V, 5 mA, 25°C | VOL |  | 0.5 | 0.7 | V | VIC = VDD/2, IOH = 5 mA, VDD = 2.7 V | 9 |
| Low-level output voltage, VDD = 2.7 V, 5 mA, full range | VOL |  |  | 1.1 | V | Full range; VIC = VDD/2, IOH = 5 mA, VDD = 2.7 V | 9 |
| Low-level output voltage, VDD = 5 V, 5 mA, 25°C | VOL |  | 0.28 | 0.4 | V | VIC = VDD/2, IOH = 5 mA, VDD = 5 V | 9 |
| Low-level output voltage, VDD = 5 V, 5 mA, full range | VOL |  |  | 0.5 | V | Full range; VIC = VDD/2, IOH = 5 mA, VDD = 5 V | 9 |
| Low-level output voltage, VDD = ±5 V, 5 mA, 25°C | VOL |  | -4.84 | -4.7 | V | VIC = VDD/2, IOH = 5 mA, VDD = ±5 V | 9 |
| Low-level output voltage, VDD = ±5 V, 5 mA, full range | VOL |  |  | -4.65 | V | Full range; VIC = VDD/2, IOH = 5 mA, VDD = ±5 V | 9 |
| Supply current per channel, VDD = 2.7 V, 25°C | IDD |  | 470 | 560 | µA | VO = VDD/2, VDD = 2.7 V | 10 |
| Supply current per channel, VDD = 5 V, 25°C | IDD |  | 550 | 660 | µA | VO = VDD/2, VDD = 5 V | 10 |
| Supply current per channel, VDD = 10 V, 25°C | IDD |  | 625 | 800 | µA | VO = VDD/2, VDD = 10 V | 10 |
| Supply current per channel, VDD = 10 V, full range | IDD |  |  | 1000 | µA | Full range; VO = VDD/2, VDD = 10 V | 10 |
| Supply voltage rejection ratio, 25°C | PSRR | 70 | 80 |  | dB | VDD = 2.7 V to 16 V, VIC = VDD/2, no load | 10 |
| Supply voltage rejection ratio, full range | PSRR | 65 |  |  | dB | Full range; VDD = 2.7 V to 16 V, VIC = VDD/2, no load | 10 |
| Slew rate at unity gain, VDD = 2.7 V, 25°C | SR | 1.35 | 2.1 |  | V/µs | VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 2.7 V | 10 |
| Slew rate at unity gain, VDD = 2.7 V, full range | SR | 1 |  |  | V/µs | Full range; VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 2.7 V | 10 |
| Slew rate at unity gain, VDD = 5 V, 25°C | SR | 1.45 | 2.4 |  | V/µs | VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 5 V | 10 |
| Slew rate at unity gain, VDD = 5 V, full range | SR | 1.2 |  |  | V/µs | Full range; VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 5 V | 10 |
| Slew rate at unity gain, VDD = ±5 V, 25°C | SR | 1.8 | 2.6 |  | V/µs | VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = ±5 V | 10 |
| Slew rate at unity gain, VDD = ±5 V, full range | SR | 1.3 |  |  | V/µs | Full range; VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = ±5 V | 10 |
| Supply voltage, single-supply | VDD | 2.7 |  | 16 | V |  | 6 |
| Supply voltage, split-supply | VDD | 1.35 |  | 8 | V | Split supply ±1.35 V to ±8 V | 6 |
| Common-mode input voltage | VICR | 0 |  |  | V |  | 6 |
| Operating free-air temperature, I-suffix | TA | -40 |  | 125 | °C | I-suffix | 6 |
| Supply voltage, absolute maximum | VDD |  |  | 16.5 | V |  | 6 |
| Input voltage, absolute maximum | VI | -0.2 |  |  | V |  | 6 |
| Input current, absolute maximum | II | -10 |  | 10 | mA |  | 6 |
| Output current, absolute maximum | IO | -100 |  | 100 | mA |  | 6 |

## CAD (KiCad official)

- Symbol: `TLV272ID`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlv272id-etched.step` / `tlv272id-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv272id.step` / `tlv272id.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv272.pdf) (50 pp, sha256 `878af99f3ea8d34e`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlv272id-datasheet.pdf)