component

TLV272DMR2G

Public Made by Adom

by adom

onsemi Operational Amplifier, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierstlv272dmr2gfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TLV272DMR2G

onsemi · Operational Amplifier · MSOP-8

TLV272DMR2G from onsemi, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT 1 output Amplifier 1 output with rail-to-rail swing, within 320 mV of the positive rail and 50 mV of the negative rail.
2 IN− 1 input Amplifier 1 inverting input.
3 IN+ 1 input Amplifier 1 non-inverting input.
4 VSS power_in Negative supply (ground) pin for both amplifiers.
5 IN+ 2 input Amplifier 2 non-inverting input.
6 IN− 2 input Amplifier 2 inverting input.
7 OUT 2 output Amplifier 2 output with rail-to-rail swing, within 320 mV of the positive rail and 50 mV of the negative rail.
8 VDD power_in Positive supply pin, 2.7 V to 36 V for the TLV/NCV272 (absolute maximum 36 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package MSOP-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 36 V TLV/NCV272/274 4
Input Common Mode Voltage Range VI -0.2 V -0.2 V to (VDD + 0.2 V) 4
Maximum Input Current II 10 mA 4
Output Current Range IO 100 mA 4
Continuous Total Power Dissipation 200 mW 4
Maximum Junction Temperature TJ 150 °C 4
Operating Ambient Temperature Range TA -40 125 °C free-air 4
Storage Temperature Range TSTG -65 150 °C 4
ESD Capability, Human Body Model ESDHBM 2 kV 4
ESD Capability, Charged Device Model ESDCDM 2 kV TLV/NCV272 4
Mounting Temperature 260 °C Infrared or Convection - 20 sec 4
Junction-to-Ambient, single layer board θJA 236 °C/W Micro-8 / MSOP-8, single layer board (Note 2) 4
Junction-to-Ambient, multi-layer board θJA 167 °C/W Micro-8 / MSOP-8, multi-layer board (Note 3) 4
Input Offset Voltage VIO -3 1.3 3 mV VIC = VDD/2, VO = VDD/2, RL = 10 k 8
Input Offset Voltage VIO -4 4 mV TA = -40°C to +125°C 8
Common Mode Rejection Ratio CMRR 90 110 dB VCM = VSS + 0.2 V to VDD - 1.35 V, VDD = 2.7 V 8
Common Mode Rejection Ratio CMRR 69 dB VDD = 2.7 V, TA = -40°C to +125°C 8
Common Mode Rejection Ratio CMRR 102 125 dB VCM = VSS + 0.2 V to VDD - 1.35 V, VDD = 5 V 8
Common Mode Rejection Ratio CMRR 80 dB VDD = 5 V, TA = -40°C to +125°C 8
Common Mode Rejection Ratio CMRR 110 130 dB VCM = VSS + 0.2 V to VDD - 1.35 V, VDD = 10 V 8
Common Mode Rejection Ratio CMRR 87 dB VDD = 10 V, TA = -40°C to +125°C 8
Common Mode Rejection Ratio CMRR 120 145 dB VCM = VSS + 0.2 V to VDD - 1.35 V, VDD = 36 V 8
Common Mode Rejection Ratio CMRR 95 dB VDD = 36 V, TA = -40°C to +125°C (TLV/NCV272) 8
Power Supply Rejection Ratio PSRR 114 135 dB VDD = 2.7 V to 36 V, VIC = VDD/2, No Load 8
Power Supply Rejection Ratio PSRR 100 dB TA = -40°C to +125°C 8
Large Signal Voltage Gain AVD 96 118 dB VO(pp) = VDD/2, RL = 10 k, VDD = 2.7 V 8
Large Signal Voltage Gain AVD 86 dB VDD = 2.7 V, TA = -40°C to +125°C 8
Large Signal Voltage Gain AVD 96 120 dB VO(pp) = VDD/2, RL = 10 k, VDD = 5 V 8
Large Signal Voltage Gain AVD 98 120 dB VO(pp) = VDD/2, RL = 10 k, VDD = 10 V 8
Large Signal Voltage Gain AVD 88 dB VDD = 10 V, TA = -40°C to +125°C 8
Input Bias Current IB 5 200 pA VDD = 5 V, VIC = VDD/2, VO = VDD/2, TA = 25°C 8
Input Bias Current IB 2000 pA VDD = 2.7 to 36 V, TA = -40°C to +125°C, TLV/NCV272 8
Input Offset Current IIO 2 75 pA VDD = 5 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω, TA = 25°C 8
Input Offset Current IIO 500 pA VDD = 2.7 to 36 V, TA = -40°C to +125°C, TLV/NCV272 8
Output Swing (High-level) VOH 0.006 0.15 V VIC = VDD/2, VDD = 2.7 V 9
Output Swing (High-level) VOH 0.22 V VDD = 2.7 V, TA = -40°C to +125°C 9
Output Swing (High-level) VOH 0.013 0.2 V VIC = VDD/2, VDD = 5 V 9
Output Swing (High-level) VOH 0.25 V VDD = 5 V, TA = -40°C to +125°C 9
Output Swing (High-level) VOH 0.023 0.08 V VIC = VDD/2, VDD = 10 V 9
Output Swing (High-level) VOH 0.1 V VDD = 10 V, TA = -40°C to +125°C 9
Output Swing (High-level) VOH 0.074 0.1 V VIC = VDD/2, VDD = 36 V 9
Output Swing (High-level) VOH 0.15 V VDD = 36 V, TA = -40°C to +125°C 9
Output Swing (Low-level) VOL 0.005 0.15 V VIC = VDD/2, VDD = 2.7 V 9
Output Swing (Low-level) VOL 0.22 V VDD = 2.7 V, TA = -40°C to +125°C 9
Output Swing (Low-level) VOL 0.01 0.1 V VIC = VDD/2, VDD = 5 V 9
Output Swing (Low-level) VOL 0.15 V VDD = 5 V, TA = -40°C to +125°C 9
Output Swing (Low-level) VOL 0.022 0.3 V VIC = VDD/2, VDD = 10 V 9
Output Swing (Low-level) VOL 0.35 V VDD = 10 V, TA = -40°C to +125°C 9
Output Swing (Low-level) VOL 0.065 0.3 V VIC = VDD/2, VDD = 36 V 9
Power Supply Quiescent Current IDD 405 525 µA VO = VDD/2, per channel, no load, VDD = 2.7 V 9
Power Supply Quiescent Current IDD 410 530 µA VO = VDD/2, per channel, no load, VDD = 5 V 9
Power Supply Quiescent Current IDD 416 540 µA VO = VDD/2, per channel, no load, VDD = 10 V 9
Power Supply Quiescent Current IDD 465 600 µA VO = VDD/2, per channel, no load, VDD = 36 V 9
Power Supply Quiescent Current IDD 700 µA TA = -40°C to +105°C 9

CAD (KiCad official)

  • Symbol: TLV272DMR2G
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: tlv272dmr2g-etched.step / tlv272dmr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv272dmr2g.step / tlv272dmr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (26 pp, sha256 f1c34a10c1972535, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF