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TLV271QDBVRQ1

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Texas Instruments Operational Amplifier, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV271QDBVRQ1

Texas Instruments · Operational Amplifier · SOT-23-5

TLV271QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Rail-to-rail amplifier output, with an absolute maximum output current of ±100 mA.
2 GND power_in Negative supply or ground; all voltage values except differential voltages are referenced to it.
3 IN+ input Non-inverting CMOS input with a common-mode range of 0 V to VDD−1.35 V and an absolute maximum input current of ±10 mA.
4 IN− input Inverting CMOS input with a common-mode range of 0 V to VDD−1.35 V and an absolute maximum input current of ±10 mA.
5 VDD power_in Positive supply, recommended 2.7 V to 16 V single supply (±1.35 V to ±8 V split), with an absolute maximum of 16.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Operational Amplifier/Comparator
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 16.5 V see Note 1 4
Input voltage range VI -0.2 V upper limit VDD + 0.2 V 4
Input current range II -10 10 mA 4
Output current range IO -100 100 mA 4
Operating free-air temperature TA -40 125 °C 4
Maximum junction temperature TJ 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Lead temperature 260 °C 1,6 mm from case for 10 seconds 4
Supply voltage, single supply VDD 2.7 16 V Single supply 4
Common-mode input voltage range VICR 0 V upper limit VDD−1.35 V 4
Operating free-air temperature TA -40 125 °C Q-suffix 4
Junction-to-ambient thermal resistance θJA 324.1 °C/W DBV (5) 4
Junction-to-case thermal resistance θJC 55 °C/W DBV (5) 4
Input offset voltage VIO 0.5 5 mV VIC = VDD/2, VO = VDD/2, RL = 10 kΩ, RS = 50 Ω, 25°C 5
Input offset voltage VIO 7 mV VIC = VDD/2, VO = VDD/2, RL = 10 kΩ, RS = 50 Ω, full range 5
Offset voltage drift αVIO 2 µV/°C RL = 10 kΩ, RS = 50 Ω, 25°C 5
Common-mode rejection ratio CMRR 53 70 dB VIC = 0 to VDD−1.35 V, RS = 50 Ω, VDD = 2.7 V, 25°C 5
Common-mode rejection ratio CMRR 54 dB VDD = 2.7 V, full range 5
Common-mode rejection ratio CMRR 58 80 dB VDD = 5 V, 25°C 5
Common-mode rejection ratio CMRR 57 dB VDD = 5 V, full range 5
Common-mode rejection ratio CMRR 67 85 dB VDD = 15 V, 25°C 5
Common-mode rejection ratio CMRR 66 dB VDD = 15 V, full range 5
Large-signal differential voltage amplification AVD 95 106 dB VO(PP) = VDD/2, RL = 10 kΩ, VDD = 2.7 V, 25°C 5
Large-signal differential voltage amplification AVD 76 dB VDD = 2.7 V, full range 5
Large-signal differential voltage amplification AVD 80 110 dB VDD = 5 V, 25°C 5
Large-signal differential voltage amplification AVD 82 dB VDD = 5 V, full range 5
Large-signal differential voltage amplification AVD 77 115 dB VDD = 15 V, 25°C 5
Large-signal differential voltage amplification AVD 79 dB VDD = 15 V, full range 5
Input offset current IIO 1 60 pA VDD = 15 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω, 25°C 5
Input offset current IIO 1000 pA VDD = 15 V, VIC = VDD/2, 125°C 5
Input bias current IIB 1 60 pA VDD = 15 V, VIC = VDD/2, VO = VDD/2, RS = 50 Ω, 25°C 5
Input bias current IIB 1000 pA VDD = 15 V, VIC = VDD/2, 125°C 5
High-level output voltage VOH 2.55 2.58 V VIC = VDD/2, IOH = −1 mA, VDD = 2.7 V, 25°C 6
High-level output voltage VOH 2.48 V IOH = −1 mA, VDD = 2.7 V, full range 6
High-level output voltage VOH 4.9 4.93 V IOH = −1 mA, VDD = 5 V, 25°C 6
High-level output voltage VOH 4.85 V IOH = −1 mA, VDD = 5 V, full range 6
High-level output voltage VOH 14.92 14.96 V IOH = −1 mA, VDD = 15 V, 25°C 6
High-level output voltage VOH 14.9 V IOH = −1 mA, VDD = 15 V, full range 6
High-level output voltage VOH 1.88 2.1 V VIC = VDD/2, IOH = −5 mA, VDD = 2.7 V, 25°C 6
High-level output voltage VOH 1.42 V IOH = −5 mA, VDD = 2.7 V, full range 6
High-level output voltage VOH 4.58 4.68 V IOH = −5 mA, VDD = 5 V, 25°C 6
High-level output voltage VOH 4.44 V IOH = −5 mA, VDD = 5 V, full range 6
High-level output voltage VOH 14.7 14.8 V IOH = −5 mA, VDD = 15 V, 25°C 6
High-level output voltage VOH 14.6 V IOH = −5 mA, VDD = 15 V, full range 6
Low-level output voltage VOL 0.1 0.15 V VIC = VDD/2, IOL = 1 mA, VDD = 2.7 V, 25°C 6
Low-level output voltage VOL 0.22 V IOL = 1 mA, VDD = 2.7 V, full range 6
Low-level output voltage VOL 0.05 0.1 V IOL = 1 mA, VDD = 5 V, 25°C 6
Low-level output voltage VOL 0.15 V IOL = 1 mA, VDD = 5 V, full range 6
Low-level output voltage VOL 0.05 0.08 V IOL = 1 mA, VDD = 15 V, 25°C 6
Low-level output voltage VOL 0.1 V IOL = 1 mA, VDD = 15 V, full range 6
Low-level output voltage VOL 0.5 0.7 V VIC = VDD/2, IOL = 5 mA, VDD = 2.7 V, 25°C 6
Low-level output voltage VOL 1.15 V IOL = 5 mA, VDD = 2.7 V, full range 6
Low-level output voltage VOL 0.28 0.4 V IOL = 5 mA, VDD = 5 V, 25°C 6
Low-level output voltage VOL 0.54 V IOL = 5 mA, VDD = 5 V, full range 6
Low-level output voltage VOL 0.19 0.3 V IOL = 5 mA, VDD = 15 V, 25°C 6
Low-level output voltage VOL 0.35 V IOL = 5 mA, VDD = 15 V, full range 6
Supply current (per channel) IDD 470 560 µA VO = VDD/2, VDD = 2.7 V, 25°C 7
Supply current (per channel) IDD 550 660 µA VO = VDD/2, VDD = 5 V, 25°C 7
Supply current (per channel) IDD 750 900 µA VO = VDD/2, VDD = 15 V, 25°C 7
Supply current (per channel) IDD 1200 µA VO = VDD/2, VDD = 15 V, full range 7
Supply voltage rejection ratio PSRR 70 80 dB VDD = 2.7 V to 15 V, VIC = VDD/2, No load, 25°C 7
Supply voltage rejection ratio PSRR 65 dB VDD = 2.7 V to 15 V, VIC = VDD/2, No load, full range 7
Slew rate at unity gain SR 1.4 2.1 V/µs VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ, VDD = 2.7 V, 25°C 7
Slew rate at unity gain SR 1.4 2.4 V/µs VDD = 5 V, 25°C 7

CAD (KiCad official)

  • Symbol: TLV271QDBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv271qdbvrq1-etched.step / tlv271qdbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv271qdbvrq1.step / tlv271qdbvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 26d175b2ef44e4c2, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF