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TLV2553IPWR

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-20

TLV2553IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN0 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
2 AIN1 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
3 AIN2 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
4 AIN3 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
5 AIN4 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
6 AIN5 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
7 AIN6 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
8 AIN7 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
9 AIN8 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
10 GND power_in Ground return terminal for the internal circuitry; unless otherwise noted, all voltage measurements are with respect to GND.
11 AIN9 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
12 AIN10 input Analog input; one of the 11 analog-signal inputs that are internally multiplexed to the converter.
13 REF- bidirectional Negative reference voltage, nominally ground; connected to the ADC analog ground when the internal reference is used.
14 REF+ bidirectional Positive reference voltage, nominally VCC; the maximum analog input range is the difference between REF+ and REF-.
15 CS input Chip select; a high-to-low transition resets the internal counters and enables DATA OUT, DATA IN and I/O CLOCK, and a low-to-high transition disables DATA IN and I/O CLOCK within a setup time.
16 DATA OUT tri_state 3-state serial output for the A/D conversion result; high impedance when CS is high and active when CS is low.
17 DATA IN input Serial data input for the 4-bit address/command and configuration bits, MSB (D7) first, shifted in on I/O CLOCK rising edges.
18 I/O CLOCK input Input/output clock that shifts serial data in and out, clocks in the input data on rising edges, and transfers conversion control to the internal state controller on the falling edge of the last I/O CLOCK.
19 EOC output End-of-conversion status output; goes from high to low after the falling edge of the last I/O CLOCK and stays low until the conversion is complete and data is ready for transfer.
20 VCC power_in Positive supply voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Data Acquisition
Pins 20

CAD (KiCad official)

  • Symbol: TLV2553IPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: tlv2553ipwr-etched.step / tlv2553ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2553ipwr.step / tlv2553ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 fe5ed762ddf82677, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF