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TLV2472QDRG4Q1

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Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV2472QDRG4Q1

Texas Instruments · Operational Amplifier · SOIC-8

TLV2472QDRG4Q1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 output; it swings to within 180 mV of each supply rail while driving a 10-mA load.
2 1IN− input Channel 1 inverting input; the common-mode input range is 0 V to VDD.
3 1IN+ input Channel 1 non-inverting input; the common-mode input range is 0 V to VDD.
4 GND power_in Ground reference; all voltage values except differential voltages are referenced to GND.
5 2IN+ input Channel 2 non-inverting input; the common-mode input range is 0 V to VDD.
6 2IN− input Channel 2 inverting input; the common-mode input range is 0 V to VDD.
7 2OUT output Channel 2 output; it swings to within 180 mV of each supply rail while driving a 10-mA load.
8 VDD power_in Positive supply; recommended single-supply range is 2.7 V to 6 V, with an absolute maximum of 7 V relative to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, single supply VDD 2.7 6 V Single supply 3
Common-mode input voltage range VICR 0 V 3
Operating free-air temperature TA -40 125 °C 3
Supply voltage VDD 7 V 3
Maximum junction temperature TJ 150 °C 3
Junction-to-ambient thermal resistance, D (8) package θJA 176 °C/W D (8) package 3
Input offset voltage, TLV247x, 25°C VIO 250 2200 µV VDD = 3 V; VIC = VDD/2, VO = VDD/2; 25°C 4
Input offset voltage, TLV247x, full range VIO 2400 µV VDD = 3 V; VIC = VDD/2, VO = VDD/2; full range 4
Input offset current, 25°C IIO 1.5 50 pA VDD = 3 V; VIC = VDD/2, VO = VDD/2; 25°C 4
Input offset current, full range IIO 300 pA VDD = 3 V; VO = VDD/2, RS = 50 Ω; full range 4
Input bias current, 25°C IIB 2 50 pA VDD = 3 V; VIC = VDD/2, VO = VDD/2; 25°C 4
Input bias current, full range IIB 300 pA VDD = 3 V; VO = VDD/2, RS = 50 Ω; full range 4
High-level output voltage, 25°C VOH 2.85 2.94 V VDD = 3 V; IOH = −2.5 mA, VIC = VDD/2; 25°C 4
High-level output voltage, full range VOH 2.8 V VDD = 3 V; IOH = −2.5 mA, VIC = VDD/2; full range 4
High-level output voltage, 25°C VOH 2.6 2.74 V VDD = 3 V; IOH = −10 mA, VIC = VDD/2; 25°C 4
High-level output voltage, full range VOH 2.5 V VDD = 3 V; IOH = −10 mA, VIC = VDD/2; full range 4
Low-level output voltage, 25°C VOL 0.07 0.15 V VDD = 3 V; IOL = 2.5 mA, VIC = VDD/2; 25°C 4
Low-level output voltage, full range VOL 0.2 V VDD = 3 V; IOL = 2.5 mA, VIC = VDD/2; full range 4
Low-level output voltage, 25°C VOL 0.2 0.35 V VDD = 3 V; IOL = 10 mA, VIC = VDD/2; 25°C 4
Low-level output voltage, full range VOL 0.5 V VDD = 3 V; IOL = 10 mA, VIC = VDD/2; full range 4
Short-circuit output current, sourcing, 25°C IOS 30 mA VDD = 3 V; sourcing; 25°C 4
Short-circuit output current, sourcing, full range IOS 20 mA VDD = 3 V; sourcing; full range 4
Short-circuit output current, sinking, 25°C IOS 30 mA VDD = 3 V; sinking; 25°C 4
Short-circuit output current, sinking, full range IOS 20 mA VDD = 3 V; sinking; full range 4
Output current IO -22 22 mA VDD = 3 V; VO = 0.5 V from rail; 25°C 4
Large-signal differential voltage amplification, 25°C AVD 90 116 dB VDD = 3 V; VO(PP) = 1 V, RL = 10 kΩ; 25°C 4
Large-signal differential voltage amplification, full range AVD 88 dB VDD = 3 V; VO(PP) = 1 V, RL = 10 kΩ; full range 4
Common-mode rejection ratio, 25°C CMRR 58 78 dB VDD = 3 V; VIC = 0 to 3 V; 25°C 4
Common-mode rejection ratio, full range CMRR 56 dB VDD = 3 V; VIC = 0 to 3 V, RS = 50 Ω; full range 4
Supply current (per channel), 25°C IDD 550 750 µA VDD = 3 V; VO = 1.5 V, no load; 25°C 4
Supply current (per channel), full range IDD 800 µA VDD = 3 V; VO = 1.5 V, no load; full range 4
Slew rate at unity gain, 25°C SR 1.1 1.4 V/µs VDD = 3 V; VO(PP) = 0.8 V, CL = 150 pF; 25°C 5
Slew rate at unity gain, full range SR 0.6 V/µs VDD = 3 V; VO(PP) = 0.8 V, RL = 10 kΩ, CL = 150 pF; full range 5
Input offset voltage, TLV247x, 25°C VIO 250 2200 µV VDD = 5 V; VIC = VDD/2, VO = VDD/2; 25°C 6
Input offset voltage, TLV247x, full range VIO 2400 µV VDD = 5 V; VIC = VDD/2, VO = VDD/2; full range 6
Input offset current, 25°C IIO 1.7 50 pA VDD = 5 V; VIC = VDD/2, VO = VDD/2; 25°C 6
Input offset current, full range IIO 300 pA VDD = 5 V; VO = VDD/2, RS = 50 Ω; full range 6
Input bias current, 25°C IIB 2.5 50 pA VDD = 5 V; VIC = VDD/2, VO = VDD/2; 25°C 6
Input bias current, full range IIB 300 pA VDD = 5 V; VO = VDD/2, RS = 50 Ω; full range 6
High-level output voltage, 25°C VOH 4.85 4.96 V VDD = 5 V; IOH = −2.5 mA, VIC = VDD/2; 25°C 6
High-level output voltage, full range VOH 4.8 V VDD = 5 V; IOH = −2.5 mA, VIC = VDD/2; full range 6
High-level output voltage, 25°C VOH 4.72 4.82 V VDD = 5 V; IOH = −10 mA, VIC = VDD/2; 25°C 6
High-level output voltage, full range VOH 4.65 V VDD = 5 V; IOH = −10 mA, VIC = VDD/2; full range 6
Low-level output voltage, 25°C VOL 0.07 0.15 V VDD = 5 V; IOL = 2.5 mA, VIC = VDD/2; 25°C 6
Low-level output voltage, full range VOL 0.2 V VDD = 5 V; IOL = 2.5 mA, VIC = VDD/2; full range 6
Low-level output voltage, 25°C VOL 0.178 0.28 V VDD = 5 V; IOL = 10 mA, VIC = VDD/2; 25°C 6
Low-level output voltage, full range VOL 0.35 V VDD = 5 V; IOL = 10 mA, VIC = VDD/2; full range 6
Short-circuit output current, sourcing, 25°C IOS 110 mA VDD = 5 V; sourcing; 25°C 6
Short-circuit output current, sourcing, full range IOS 60 mA VDD = 5 V; sourcing; full range 6
Short-circuit output current, sinking, 25°C IOS 90 mA VDD = 5 V; sinking; 25°C 6
Short-circuit output current, sinking, full range IOS 60 mA VDD = 5 V; sinking; full range 6
Output current IO -35 35 mA VDD = 5 V; VO = 0.5 V from rail; 25°C 6
Large-signal differential voltage amplification, 25°C AVD 92 120 dB VDD = 5 V; VO(PP) = 3 V, RL = 10 kΩ; 25°C 6
Large-signal differential voltage amplification, full range AVD 91 dB VDD = 5 V; VO(PP) = 3 V, RL = 10 kΩ; full range 6
Common-mode rejection ratio, 25°C CMRR 62 84 dB VDD = 5 V; VIC = 0 to 5 V; 25°C 6
Common-mode rejection ratio, full range CMRR 58 dB VDD = 5 V; VIC = 0 to 5 V, RS = 50 Ω; full range 6
Supply current (per channel), 25°C IDD 600 900 µA VDD = 5 V; VO = 2.5 V, no load; 25°C 6
Supply current (per channel), full range IDD 1000 µA VDD = 5 V; VO = 2.5 V, no load; full range 6
Slew rate at unity gain, 25°C SR 1.1 1.5 V/µs VDD = 5 V; VO(PP) = 2 V, CL = 150 pF; 25°C 7
Slew rate at unity gain, full range SR 0.7 V/µs VDD = 5 V; VO(PP) = 2 V, RL = 10 kΩ, CL = 150 pF; full range 7

CAD (KiCad official)

  • Symbol: TLV2472QDRG4Q1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlv2472qdrg4q1-etched.step / tlv2472qdrg4q1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2472qdrg4q1.step / tlv2472qdrg4q1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 0a3158a3a88fc396, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF