TLV2472AID from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OUT	output	Channel 1 rail-to-rail output, able to drive ±10mA at 180mV from each supply rail.
2	1IN−	input	Channel 1 inverting input; common-mode range is 0 to VDD.
3	1IN+	input	Channel 1 non-inverting input; common-mode range is 0 to VDD.
4	GND	power_in	Negative supply/ground reference for the device.
5	2IN+	input	Channel 2 non-inverting input; common-mode range is 0 to VDD.
6	2IN−	input	Channel 2 inverting input; common-mode range is 0 to VDD.
7	2OUT	output	Channel 2 rail-to-rail output, able to drive ±10mA at 180mV from each supply rail.
8	VDD	power_in	Positive supply, 2.7V to 6V single supply (absolute maximum 7V).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Amplifiers
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage (absolute max)	VDD			7	V	with respect to GND	4
Operating free-air temperature, I-suffix (abs max)	TA	-40		125	°C	I-suffix	4
Maximum junction temperature	TJ			150	°C		4
Storage temperature range	Tstg	-65		150	°C		4
Lead temperature				260	°C	1,6 mm (1/16 inch) from case for 10 seconds	4
Supply voltage, single supply	VDD	2.7		6	V	Single supply	4
Supply voltage, split supply	VDD	-1.35		3	V	Split supply, printed ±1.35 to ±3	4
Common-mode input voltage range	VICR	0			V	0 to VDD	4
Operating free-air temperature, I-suffix	TA	-40		125	°C	I-suffix	4
Shutdown high-level voltage	VIH	2			V	Relative to GND	4
Shutdown low-level voltage	VIL			0.8	V	Relative to GND	4
Thermal resistance junction to case, D (8)	θJC		38.3		°C/W	D (8) package	4
Thermal resistance junction to ambient, D (8)	θJA		176		°C/W	D (8) package	4
Input offset voltage (TLV247xA)	VIO		250	1600	µV	VDD = 3V, TA = +25°C	5
Input offset voltage (TLV247xA), full range	VIO			1800	µV	VDD = 3V, Full range	5
Input offset current	IIO		1.5	50	pA	VDD = 3V, VIC = VDD/2, VO = VDD/2, RS = 50Ω, +25°C	5
Input offset current, I-suffix full range	IIO			300	pA	VDD = 3V, TLV247xI, Full range	5
Input bias current	IIB		2	50	pA	VDD = 3V, +25°C	5
Input bias current, I-suffix full range	IIB			300	pA	VDD = 3V, TLV247xI, Full range	5
High-level output voltage	VOH	2.85	2.94		V	VDD = 3V, IOH = -2.5mA, VIC = VDD/2, +25°C	5
High-level output voltage	VOH	2.6	2.74		V	VDD = 3V, IOH = -10mA, VIC = VDD/2, +25°C	5
Low-level output voltage	VOL		0.07	0.15	V	VDD = 3V, IOL = 2.5mA, VIC = VDD/2, +25°C	5
Low-level output voltage	VOL		0.2	0.35	V	VDD = 3V, IOL = 10mA, VIC = VDD/2, +25°C	5
Large-signal differential voltage amplification	AVD	90	116		dB	VDD = 3V, VO(PP) = 1V, RL = 10kΩ, +25°C	5
Common-mode rejection ratio	CMRR	61	78		dB	VDD = 3V, VIC = 0V to 3V, RS = 50Ω, +25°C	5
Common-mode rejection ratio, I-suffix full range	CMRR	58			dB	VDD = 3V, VIC = 0V to 3V, RS = 50Ω, TLV247xI, Full range	5
Supply voltage rejection ratio	kSVR	74	90		dB	VDD = 2.7V to 6V, VIC = VDD/2, No load, +25°C	6
Supply voltage rejection ratio	kSVR	77	92		dB	VDD = 3V to 5V, VIC = VDD/2, No load, +25°C	6
Supply current (per channel)	IDD		550	750	µA	VDD = 3V, VO = 1.5V, No load, +25°C	6
Supply current (per channel), full range	IDD			800	µA	VDD = 3V, VO = 1.5V, No load, Full range	6
Supply current in shutdown (per channel)	IDD(SHDN)		350	1500	nA	VDD = 3V, SHDN = 0V, +25°C	6
Supply current in shutdown, I-suffix full range	IDD(SHDN)			4000	nA	VDD = 3V, SHDN = 0V, TLV247xI, Full range	6
Slew rate at unity gain	SR	1.1	1.4		V/µs	VDD = 3V, VO(PP) = 0.8V, CL = 150pF, RL = 10kΩ, +25°C	6
Input offset voltage (TLV247xA)	VIO		250	1600	µV	VDD = 5V, TA = +25°C	7
Input offset voltage (TLV247xA), full range	VIO			2000	µV	VDD = 5V, Full range	7
Input offset current	IIO		1.7	50	pA	VDD = 5V, VIC = VDD/2, VO = VDD/2, RS = 50Ω, +25°C	7
Input offset current, I-suffix full range	IIO			300	pA	VDD = 5V, TLV247xI, Full range	7
Input bias current	IIB		2.5	50	pA	VDD = 5V, +25°C	7
Input bias current, I-suffix full range	IIB			300	pA	VDD = 5V, TLV247xI, Full range	7
High-level output voltage	VOH	4.85	4.96		V	VDD = 5V, IOH = -2.5mA, VIC = VDD/2, +25°C	7
High-level output voltage	VOH	4.72	4.82		V	VDD = 5V, IOH = -10mA, VIC = VDD/2, +25°C	7
Low-level output voltage	VOL		0.07	0.15	V	VDD = 5V, IOL = 2.5mA, VIC = VDD/2, +25°C	7
Low-level output voltage	VOL		0.178	0.28	V	VDD = 5V, IOL = 10mA, VIC = VDD/2, +25°C	7
Large-signal differential voltage amplification	AVD	92	120		dB	VDD = 5V, VO(PP) = 3V, RL = 10kΩ, +25°C	7
Common-mode rejection ratio	CMRR	64	84		dB	VDD = 5V, VIC = 0V to 5V, RS = 50Ω, +25°C	7
Common-mode rejection ratio, I-suffix full range	CMRR	58			dB	VDD = 5V, VIC = 0V to 5V, RS = 50Ω, TLV247xI, Full range	7
Supply voltage rejection ratio	kSVR	74	90		dB	VDD = 2.7V to 6V, VIC = VDD/2, No load, +25°C	7
Supply current (per channel)	IDD		600	900	µA	VDD = 5V, VO = 2.5V, No load, +25°C	7
Supply current (per channel), full range	IDD			1000	µA	VDD = 5V, VO = 2.5V, No load, Full range	7
Supply current in shutdown (per channel)	IDD(SHDN)		1000	2500	nA	VDD = 5V, SHDN = 0V, +25°C	8
Supply current in shutdown, I-suffix full range	IDD(SHDN)			6000	nA	VDD = 5V, SHDN = 0V, TLV247xI, Full range	8
Slew rate at unity gain	SR	1.1	1.5		V/µs	VDD = 5V, VO(PP) = 2V, CL = 150pF, RL = 10kΩ, +25°C	8
Temperature coefficient of input offset voltage	αVIO		0.4		µV/°C	VDD = 3V, VIC = VDD/2, VO = VDD/2, RS = 50Ω	5
Temperature coefficient of input offset voltage	αVIO		0.4		µV/°C	VDD = 5V, VIC = VDD/2, VO = VDD/2, RS = 50Ω	7
Gain-bandwidth product			2.8		MHz	VDD = 5V, f = 10kHz, RL = 600Ω, +25°C	8

CAD (KiCad official)

Symbol: TLV2472AID
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tlv2472aid-etched.step / tlv2472aid-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2472aid.step / tlv2472aid.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (71 pp, sha256 9d7c76e7fb1713e8, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

TLV2472AID

Verified TLV2472AID

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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