component

TLV2464CN

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierstlv2464cnfactory-2.0.0extractor-text

Verified TLV2464CN

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLV2464CN · PDIP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 76-page datasheet
  • ✓distributor: lcsc C1347727, digikey 2156-TLV2464CN-ND, mouser 595-TLV2464CN
  • ✓family: DIP-14_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ke5n518b/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlv2464cn.kicad_sym✓ tlv2464cn.kicad_mod✓ tlv2464cn.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers tlv2464cn: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
tlv2464cn-etched.glb Publish 0.1.0 · Ray 4d ago
tlv2464cn-etched.step tlv2464cn: factory component page (tier=mfr) · Ray 4d ago
tlv2464cn-hero.glb tlv2464cn: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
tlv2464cn-hero.overlay.json Publish 0.1.0 · Ray 4d ago
tlv2464cn.glb Publish 0.1.0 · Ray 4d ago
tlv2464cn.kicad_mod Publish 0.1.0 · Ray 4d ago
tlv2464cn.kicad_sym Publish 0.1.0 · Ray 4d ago
tlv2464cn.lbr Publish 0.1.0 · Ray 4d ago
tlv2464cn.step Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 4d ago

TLV2464CN

Texas Instruments · Operational Amplifier · PDIP-14

TLV2464CN from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of operational amplifier channel 1, rated for ±175 mA absolute maximum output current.
2 1IN− input Inverting input of operational amplifier channel 1; input current is limited to ±200 mA (any input) absolute maximum.
3 1IN+ input Non-inverting input of operational amplifier channel 1; the input common-mode range extends beyond the supply rails.
4 VDD+ power_in Positive supply, 2.7 V to 6 V per the selection guide, with an absolute maximum supply voltage of 6 V referenced to GND.
5 2IN+ input Non-inverting input of operational amplifier channel 2; the input common-mode range extends beyond the supply rails.
6 2IN− input Inverting input of operational amplifier channel 2; input current is limited to ±200 mA (any input) absolute maximum.
7 2OUT output Output of operational amplifier channel 2, rated for ±175 mA absolute maximum output current.
8 3OUT output Output of operational amplifier channel 3, rated for ±175 mA absolute maximum output current.
9 3IN− input Inverting input of operational amplifier channel 3; input current is limited to ±200 mA (any input) absolute maximum.
10 3IN+ input Non-inverting input of operational amplifier channel 3; the input common-mode range extends beyond the supply rails.
11 GND power_in Ground (0 V) reference; all voltages in the absolute maximum ratings are referenced to GND.
12 4IN+ input Non-inverting input of operational amplifier channel 4; the input common-mode range extends beyond the supply rails.
13 4IN− input Inverting input of operational amplifier channel 4; input current is limited to ±200 mA (any input) absolute maximum.
14 4OUT output Output of operational amplifier channel 4, rated for ±175 mA absolute maximum output current.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Amplifiers
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VDD (single supply) VDD 2.7 6 V Single supply 7
Supply voltage, VDD (split supply) VDD 1.35 3 V Split supply; printed as ±1.35 V to ±3 V 7
Common-mode input voltage range, VICR VICR 0 V Upper limit printed as VDD 7
Operating free-air temperature, TA (C suffix) TA 0 70 °C C-suffix 7
Supply voltage, VDD VDD 6 V All voltages except differential are referenced to GND (Note 1) 6
Differential input voltage, VID VID -0.2 V Upper limit printed as VDD + 0.2 V 6
Input current, II (any input) II -200 200 mA Any input 6
Output current, IO IO -175 175 mA 6
Total input current, II (into VDD+) II 175 mA Into VDD+ 6
Total output current, IO (out of GND) IO 175 mA Out of GND 6
Operating free-air temperature range, TA (C suffix) TA 0 70 °C C suffix 6
Maximum junction temperature, TJ TJ 150 °C 6
Storage temperature range, Tstg Tstg -65 150 °C 6
Input offset voltage, VIO (25°C) VIO 500 2000 µV VDD = 3 V, VIC = 1.5 V; TA = 25°C 7
Input offset voltage, VIO (full range) VIO 2200 µV VDD = 3 V, VIC = 1.5 V; full range TA 7
Input offset current, IIO (25°C) IIO 2.8 7 nA VDD = 3 V, VIC = 1.5 V; TA = 25°C 7
Input offset current, IIO (full range) IIO 20 nA VDD = 3 V, VIC = 1.5 V; full range TA (C suffix) 7
Input bias current, IIB (25°C) IIB 4.4 14 nA VDD = 3 V, VIC = 1.5 V, VO = 1.5 V; TA = 25°C 7
Input bias current, IIB (full range) IIB 25 nA VDD = 3 V, VIC = 1.5 V, VO = 1.5 V; full range TA (C suffix) 7
High-level output voltage, VOH (25°C) VOH 2.9 V VDD = 3 V, IOH = -2.5 mA; TA = 25°C 7
High-level output voltage, VOH (full range) VOH 2.8 V VDD = 3 V, IOH = -2.5 mA; full range TA 7
High-level output voltage, VOH (25°C) VOH 2.7 V VDD = 3 V, IOH = -10 mA; TA = 25°C 7
High-level output voltage, VOH (full range) VOH 2.5 V VDD = 3 V, IOH = -10 mA; full range TA 7
Low-level output voltage, VOL (25°C) VOL 0.1 V VDD = 3 V, VIC = 1.5 V, IOL = 2.5 mA; TA = 25°C 7
Low-level output voltage, VOL (full range) VOL 0.2 V VDD = 3 V, VIC = 1.5 V, IOL = 2.5 mA; full range TA 7
Low-level output voltage, VOL (25°C) VOL 0.3 V VDD = 3 V, VIC = 1.5 V, IOL = 10 mA; TA = 25°C 7
Low-level output voltage, VOL (full range) VOL 0.5 V VDD = 3 V, VIC = 1.5 V, IOL = 10 mA; full range TA 7
Output current, IO IO -40 40 mA Measured 1 V from rail; 25°C 7
Large-signal differential voltage amplification, AVD (25°C) AVD 90 105 dB RL = 10 kΩ, VO(PP) = 1 V; 25°C 7
Common-mode rejection ratio, CMRR (25°C) CMRR 66 80 dB VICR = 0 to 3 V, RS = 50 Ω; 25°C 8
Supply voltage rejection ratio, kSVR (25°C) kSVR 80 85 dB VDD = 2.7 V to 6 V, VIC = VDD/2, no load; 25°C 8
Supply current per channel, IDD (25°C) IDD 0.5 0.575 mA VO = 1.5 V, no load; 25°C 8
Supply current per channel, IDD (full range) IDD 0.9 mA VO = 1.5 V, no load; full range TA 8
Slew rate at unity gain, SR (25°C) SR 0.9 1.6 V/µs VO(PP) = 0.8 V, CL = 160 pF, RL = 10 kΩ; 25°C 8
Slew rate at unity gain, SR (full range) SR 0.8 V/µs VO(PP) = 0.8 V, CL = 160 pF, RL = 10 kΩ; full range TA 8
Input offset voltage, VIO (25°C) VIO 500 2000 µV VDD = 5 V; TA = 25°C 9
Input offset voltage, VIO (full range) VIO 2200 µV VDD = 5 V; full range TA 9
Input offset current, IIO (25°C) IIO 0.3 7 nA VDD = 5 V, VIC = 2.5 V; TA = 25°C 9
Input offset current, IIO (full range) IIO 15 nA VDD = 5 V, VIC = 2.5 V; full range TA (C suffix) 9
Input bias current, IIB (25°C) IIB 1.3 14 nA VDD = 5 V, VIC = 2.5 V, VO = 2.5 V; TA = 25°C 9
Input bias current, IIB (full range) IIB 30 nA VDD = 5 V, VIC = 2.5 V, VO = 2.5 V; full range TA (C suffix) 9
High-level output voltage, VOH (25°C) VOH 4.9 V VDD = 5 V, IOH = -2.5 mA; TA = 25°C 9
High-level output voltage, VOH (full range) VOH 4.8 V VDD = 5 V, IOH = -2.5 mA; full range TA 9
High-level output voltage, VOH (25°C) VOH 4.8 V VDD = 5 V, IOH = -10 mA; TA = 25°C 9
High-level output voltage, VOH (full range) VOH 4.7 V VDD = 5 V, IOH = -10 mA; full range TA 9
Low-level output voltage, VOL (25°C) VOL 0.1 V VIC = 2.5 V, IOL = 2.5 mA; TA = 25°C 9
Low-level output voltage, VOL (full range) VOL 0.2 V VIC = 2.5 V, IOL = 2.5 mA; full range TA 9
Low-level output voltage, VOL (25°C) VOL 0.2 V VIC = 2.5 V, IOL = 10 mA; TA = 25°C 9
Low-level output voltage, VOL (full range) VOL 0.3 V VIC = 2.5 V, IOL = 10 mA; full range TA 9
Output current, IO IO -80 80 mA Measured at 1 V from rail; 25°C 9
Large-signal differential voltage amplification, AVD (25°C) AVD 92 109 dB VIC = 2.5 V, RL = 10 kΩ; 25°C 9
Large-signal differential voltage amplification, AVD (full range) AVD 90 dB VIC = 2.5 V, VO = 1 V to 4 V, RL = 10 kΩ; full range TA 9
Common-mode rejection ratio, CMRR (25°C) CMRR 71 85 dB VICR = 0 V to 5 V, RS = 50 Ω; 25°C 9
Supply voltage rejection ratio, kSVR (25°C) kSVR 80 85 dB VDD = 2.7 V to 6 V, VIC = VDD/2, no load; 25°C 9
Supply current per channel, IDD (25°C) IDD 0.55 0.65 mA VO = 2.5 V, no load; 25°C 9
Supply current per channel, IDD (full range) IDD 1 mA VO = 2.5 V, no load; full range TA 9
Slew rate at unity gain, SR (25°C) SR 0.9 1.6 V/µs VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ; 25°C 10
Slew rate at unity gain, SR (full range) SR 0.8 V/µs VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ; full range TA 10
Junction-to-ambient thermal resistance, θJA θJA 78 °C/W N (14, 16) package, C and I suffix; not production tested 6

CAD (KiCad official)

  • Symbol: TLV2464CN
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: tlv2464cn-etched.step / tlv2464cn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2464cn.step / tlv2464cn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (76 pp, sha256 8c30ab955a433bf3, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF