component

TLV2464AIDR

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoperational amplifier-comparatortlv2464aidrfactory-2.0.0extractor-text

Verified TLV2464AIDR

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLV2464AIDR · SOIC-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 84-page datasheet
  • ✓distributor: lcsc C2878590, digikey 296-TLV2464AIDRTR-ND, mouser 595-TLV2464AIDR
  • ✓family: SOIC-14_3.9x8.7mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-czvhphgh/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.80)
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlv2464aidr.kicad_sym✓ tlv2464aidr.kicad_mod✓ tlv2464aidr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers tlv2464aidr: viewers · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
tlv2464aidr-etched.glb Publish 0.1.0 · Ray 6d ago
tlv2464aidr-etched.step tlv2464aidr: factory component page (tier=mfr) · Ray 6d ago
tlv2464aidr-hero.glb tlv2464aidr: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
tlv2464aidr-hero.overlay.json Publish 0.1.0 · Ray 6d ago
tlv2464aidr.glb Publish 0.1.0 · Ray 6d ago
tlv2464aidr.kicad_mod Publish 0.1.0 · Ray 6d ago
tlv2464aidr.kicad_sym Publish 0.1.0 · Ray 6d ago
tlv2464aidr.lbr Publish 0.1.0 · Ray 6d ago
tlv2464aidr.step Publish 0.1.0 · Ray 6d ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 6d ago

TLV2464AIDR

Texas Instruments · Operational Amplifier · SOIC-14

TLV2464AIDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Channel 1 rail-to-rail output with ±80 mA drive capability.
2 1IN− input Channel 1 inverting input; common-mode range extends beyond the supply rails.
3 1IN+ input Channel 1 noninverting input; common-mode range extends beyond the supply rails.
4 VDD+ power_in Positive supply, 2.7 V to 6 V operation with absolute maximum of 6 V.
5 2IN+ input Channel 2 noninverting input; common-mode range extends beyond the supply rails.
6 2IN− input Channel 2 inverting input; common-mode range extends beyond the supply rails.
7 2OUT output Channel 2 rail-to-rail output with ±80 mA drive capability.
8 3OUT output Channel 3 rail-to-rail output with ±80 mA drive capability.
9 3IN− input Channel 3 inverting input; common-mode range extends beyond the supply rails.
10 3IN+ input Channel 3 noninverting input; common-mode range extends beyond the supply rails.
11 GND power_in Ground / negative supply reference; all voltage values except differential voltages are specified with respect to GND.
12 4IN+ input Channel 4 noninverting input; common-mode range extends beyond the supply rails.
13 4IN− input Channel 4 inverting input; common-mode range extends beyond the supply rails.
14 4OUT output Channel 4 rail-to-rail output with ±80 mA drive capability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Operational Amplifier/Comparator
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (A) VIO 500 1500 µV VDD=3 V, VIC=1.5 V, VO=1.5 V, RS=50 Ω, TA=25°C 7
Input offset voltage (A), full range VIO 1700 µV VDD=3 V, Full range 7
Input offset current IIO 2.8 7 nA VDD=3 V, VIC=1.5 V, TA=25°C 7
Input offset current, full range IIO 75 nA VDD=3 V, I suffix, Full range 7
Input bias current IIB 4.4 14 nA VDD=3 V, VIC=1.5 V, TA=25°C 7
Input bias current, full range IIB 75 nA VDD=3 V, I suffix, Full range 7
High-level output voltage VOH 2.9 V VDD=3 V, IOH=-2.5 mA, 25°C 7
High-level output voltage, full range VOH 2.8 V VDD=3 V, IOH=-2.5 mA, Full range 7
High-level output voltage VOH 2.7 V VDD=3 V, IOH=-10 mA, 25°C 7
High-level output voltage, full range VOH 2.5 V VDD=3 V, IOH=-10 mA, Full range 7
Low-level output voltage VOL 0.1 V VDD=3 V, VIC=1.5 V, IOL=2.5 mA, 25°C 7
Low-level output voltage, full range VOL 0.2 V VDD=3 V, VIC=1.5 V, IOL=2.5 mA, Full range 7
Low-level output voltage VOL 0.3 V VDD=3 V, VIC=1.5 V, IOL=10 mA, 25°C 7
Low-level output voltage, full range VOL 0.5 V VDD=3 V, VIC=1.5 V, IOL=10 mA, Full range 7
Short-circuit output current, sourcing IOS 50 mA VDD=3 V, Sourcing, 25°C 7
Short-circuit output current, sourcing, full range IOS 20 mA VDD=3 V, Sourcing, Full range 7
Short-circuit output current, sinking IOS 40 mA VDD=3 V, Sinking, 25°C 7
Short-circuit output current, sinking, full range IOS 20 mA VDD=3 V, Sinking, Full range 7
Large-signal differential voltage amplification AVD 90 105 dB VDD=3 V, RL=10 kΩ, VO(PP)=1 V, 25°C 7
Large-signal differential voltage amplification, full range AVD 89 dB VDD=3 V, RL=10 kΩ, VO(PP)=1 V, Full range 7
Common-mode rejection ratio CMRR 66 80 dB VDD=3 V, VICR=0 to 3 V, RS=50 Ω, 25°C 8
Common-mode rejection ratio, full range CMRR 60 dB VDD=3 V, VICR=0 to 3 V, RS=50 Ω, I/Q/M, Full range 8
Supply voltage rejection ratio kSVR 80 85 dB VDD=2.7 V to 6 V, VIC=VDD/2, No load, 25°C 8
Supply voltage rejection ratio, full range kSVR 75 dB VDD=2.7 V to 6 V, VIC=VDD/2, No load, Full range 8
Supply voltage rejection ratio kSVR 85 95 dB VDD=3 V to 5 V, VIC=VDD/2, No load, 25°C 8
Supply voltage rejection ratio, full range kSVR 80 dB VDD=3 V to 5 V, VIC=VDD/2, No load, Full range 8
Supply current (per channel) IDD 0.5 0.575 mA VDD=3 V, VO=1.5 V, No load, 25°C 8
Supply current (per channel), full range IDD 0.9 mA VDD=3 V, VO=1.5 V, No load, Full range 8
Slew rate at unity gain SR 0.9 1.6 V/µs VDD=3 V, VO(PP)=0.8 V, CL=160 pF, RL=10 kΩ, 25°C 8
Slew rate at unity gain, full range SR 0.8 V/µs VDD=3 V, VO(PP)=0.8 V, CL=160 pF, RL=10 kΩ, Full range 8
Input offset voltage (A) VIO 500 1500 µV VDD=5 V, VIC=2.5 V, VO=2.5 V, RS=50 Ω, 25°C 9
Input offset voltage (A), full range VIO 1700 µV VDD=5 V, Full range 9
Input offset current IIO 0.3 7 nA VDD=5 V, VIC=2.5 V, 25°C 9
Input offset current, full range IIO 60 nA VDD=5 V, I/Q/M, Full range 9
Input bias current IIB 1.3 14 nA VDD=5 V, VIC=2.5 V, 25°C 9
Input bias current, full range IIB 60 nA VDD=5 V, I/Q/M, Full range 9
High-level output voltage VOH 4.9 V VDD=5 V, IOH=-2.5 mA, 25°C 9
High-level output voltage, full range VOH 4.8 V VDD=5 V, IOH=-2.5 mA, Full range 9
High-level output voltage VOH 4.8 V VDD=5 V, IOH=-10 mA, 25°C 9
High-level output voltage, full range VOH 4.7 V VDD=5 V, IOH=-10 mA, Full range 9
Low-level output voltage VOL 0.1 V VDD=5 V, VIC=2.5 V, IOL=2.5 mA, 25°C 9
Low-level output voltage, full range VOL 0.2 V VDD=5 V, VIC=2.5 V, IOL=2.5 mA, Full range 9
Low-level output voltage VOL 0.2 V VDD=5 V, VIC=2.5 V, IOL=10 mA, 25°C 9
Low-level output voltage, full range VOL 0.3 V VDD=5 V, VIC=2.5 V, IOL=10 mA, Full range 9
Short-circuit output current, sourcing IOS 145 mA VDD=5 V, Sourcing, 25°C 9
Short-circuit output current, sourcing, full range IOS 60 mA VDD=5 V, Sourcing, Full range 9
Short-circuit output current, sinking IOS 100 mA VDD=5 V, Sinking, 25°C 9
Short-circuit output current, sinking, full range IOS 60 mA VDD=5 V, Sinking, Full range 9
Large-signal differential voltage amplification AVD 92 109 dB VDD=5 V, VIC=2.5 V, RL=10 kΩ, VO=1 V to 4 V, 25°C 9
Large-signal differential voltage amplification, full range AVD 90 dB VDD=5 V, VIC=2.5 V, RL=10 kΩ, VO=1 V to 4 V, Full range 9
Common-mode rejection ratio CMRR 71 85 dB VDD=5 V, VICR=0 V to 5 V, RS=50 Ω, 25°C 9
Common-mode rejection ratio, full range CMRR 60 dB VDD=5 V, VICR=0 V to 5 V, RS=50 Ω, I/Q/M, Full range 9
Supply current (per channel) IDD 0.55 0.65 mA VDD=5 V, VO=2.5 V, No load, 25°C 9
Supply current (per channel), full range IDD 1 mA VDD=5 V, VO=2.5 V, No load, Full range 9
Slew rate at unity gain SR 0.9 1.6 V/µs VDD=5 V, VO(PP)=2 V, CL=160 pF, RL=10 kΩ, 25°C 10
Slew rate at unity gain, full range SR 0.8 V/µs VDD=5 V, VO(PP)=2 V, CL=160 pF, RL=10 kΩ, Full range 10
Supply voltage, single supply VDD 2.7 6 V Single supply 7
Supply voltage, split supply VDD -1.35 3 V Split supply, printed ±1.35 to ±3 7
Common-mode input voltage range VICR 0 V Upper limit is VDD 7
Operating free-air temperature, I suffix TA -40 125 °C I-suffix and Q-suffix 7
Supply voltage VDD 6 V Voltages with respect to GND 6
Output current IO -175 175 mA Printed ± 175 mA 6
Maximum junction temperature TJ 150 °C 6
Thermal resistance junction-to-ambient, D (14) θJA 122.6 °C/W D (14) package, C and I suffix table 6
Thermal resistance junction-to-case, D (14) θJC 26.9 °C/W D (14) package, C and I suffix table 6

CAD (KiCad official)

  • Symbol: TLV2464AIDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tlv2464aidr-etched.step / tlv2464aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2464aidr.step / tlv2464aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (84 pp, sha256 c6d8801e35b301ec, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF