Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

main

Ray tlv2460idr: specified limits as data (metadata.characteristics, 56 rows from the datasheet) 9dce85c 14d ago

TLV2460IDR

Texas Instruments · Operational Amplifier · SOIC-8

TLV2460IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No internal connection.
2	IN−	input	Inverting input of the rail-to-rail input operational amplifier, whose common-mode range extends beyond the supply rails.
3	IN+	input	Noninverting input of the rail-to-rail input operational amplifier, whose common-mode range extends beyond the supply rails.
4	GND	power_in	Ground (negative supply); all voltage values except differential voltages are referenced to it.
5	NC	unconnected	No internal connection.
6	OUT	output	Rail-to-rail output with ±80 mA drive capability, placed in a high-impedance state during shutdown.
7	VDD+	power_in	Positive supply pin, 2.7 V to 6 V operation with an absolute maximum of 6 V.
8	SHDN	input	Shutdown input that places the amplifier in an ultralow supply current mode (0.3 µA/channel) with the output in high impedance.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Amplifiers/Comparators
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage, VDD	VDD			6	V		6
Differential input voltage	VID	-0.2			V	Range −0.2 V to VDD + 0.2 V; upper limit not numeric	6
Input current (any input)	II	-200		200	mA		6
Output current	IO	-175		175	mA		6
Total input current (into VDD+)	II			175	mA	Into VDD+	6
Total output current (out of GND)	IO			175	mA	Out of GND	6
Operating free-air temperature range	TA	-40		125	°C	I suffix	6
Maximum junction temperature	TJ			150	°C		6
Storage temperature range	Tstg	-65		150	°C		6
Lead temperature				260	°C	1,6 mm (1/16 inch) from case for 10 seconds	6
Single supply voltage	VDD	2.7		6	V	Single supply	7
Split supply voltage	VDD	1.35		3	V	Split supply, ±1.35 V to ±3 V	7
Common-mode input voltage range	VICR	0			V	Maximum printed as VDD	7
Operating free-air temperature	TA	-40		125	°C	I-suffix and Q-suffix	7
Shutdown on voltage level (high)	VIH	2			V	Relative to GND terminal	7
Shutdown off voltage level (low)	VIL			0.7	V	Relative to GND terminal	7
Junction-to-ambient thermal resistance, D (8)	θJA		176		°C/W	D (8) package; informational, not production tested	6
Junction-to-case thermal resistance, D (8)	θJC		38.3		°C/W	D (8) package; informational, not production tested	6
Input offset voltage	VIO		500	2000	µV	VDD = 3 V, VIC = 1.5 V; 25°C	7
Input offset voltage	VIO			2200	µV	VDD = 3 V, VIC = 1.5 V; full range	7
Input bias current	IIB		4.4	14	nA	VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω; 25°C	7
Input bias current	IIB			75	nA	I/Q/M suffix; full range	7
High-level output voltage	VOH	2.7			V	IOH = −10 mA; 25°C	8
Low-level output voltage	VOL			0.1	V	VIC = 1.5 V, IOL = 2.5 mA; 25°C	8
Low-level output voltage	VOL			0.2	V	VIC = 1.5 V, IOL = 2.5 mA; full range	8
Low-level output voltage	VOL			0.3	V	VIC = 1.5 V, IOL = 10 mA; 25°C	8
Input offset current	IIO		2.8	7	nA	VDD = 3 V, VIC = 1.5 V, VO = 1.5 V; 25°C	7
Short-circuit output current	IOS	50			mA	Sourcing; 25°C	8
Short-circuit output current	IOS	40			mA	Sinking; 25°C	8
Output current	IO	-40		40	mA	Measured 1 V from rail; 25°C	8
Large-signal differential voltage amplification	AVD	90	105		dB	RL = 10 kΩ, VO(PP) = 1 V; 25°C	7
Common-mode rejection ratio	CMRR	66	80		dB	VICR = 0 to 3 V, RS = 50 Ω; 25°C	7
Supply voltage rejection ratio	kSVR	80	85		dB	VDD = 2.7 V to 6 V, VIC = VDD/2, No load; 25°C	8
Supply current (per channel)	IDD		0.5	0.575	mA	VO = 1.5 V, No load; 25°C	8
Supply current (per channel)	IDD			0.9	mA	VO = 1.5 V, No load; full range	8
Slew rate at unity gain	SR	0.9	1.6		V/µs	VO(PP) = 0.8 V, CL = 160 pF, RL = 10 kΩ; 25°C	8
Supply current in shutdown (per channel)	IDD(SHDN)			2.5	µA	SHDN < 0.7 V, per channel in shutdown; full range	8
Input offset voltage	VIO		500	2000	µV	VDD = 5 V, VIC = 2.5 V; 25°C	9
Input offset voltage	VIO			2200	µV	VDD = 5 V, VIC = 2.5 V; full range	9
Input bias current	IIB		1.3	14	nA	VIC = 2.5 V, VO = 2.5 V, RS = 50 Ω; 25°C	9
Input bias current	IIB			60	nA	I/Q/M suffix; full range	9
High-level output voltage	VOH	4.9			V	IOH = −2.5 mA; 25°C	9
High-level output voltage	VOH	4.8			V	IOH = −2.5 mA; full range	9
Low-level output voltage	VOL			0.1	V	VIC = 2.5 V, IOL = 2.5 mA; 25°C	9
Low-level output voltage	VOL			0.2	V	VIC = 2.5 V, IOL = 2.5 mA; full range	9
Input offset current	IIO		0.3	7	nA	VDD = 5 V, VIC = 2.5 V, VO = 2.5 V; 25°C	9
Short-circuit output current	IOS	145			mA	Sourcing; 25°C	9
Short-circuit output current	IOS	100			mA	Sinking; 25°C	9
Output current	IO	-80		80	mA	Measured at 1 V from rail; 25°C	9
Large-signal differential voltage amplification	AVD	92	109		dB	VIC = 2.5 V, RL = 10 kΩ; 25°C	9
Common-mode rejection ratio	CMRR	71	85		dB	VICR = 0 V to 5 V, RS = 50 Ω; 25°C	9
Supply voltage rejection ratio	kSVR	80	85		dB	VDD = 2.7 V to 6 V, VIC = VDD/2, No load; 25°C	9
Supply current (per channel)	IDD		0.55	0.65	mA	VO = 2.5 V, No load; 25°C	9
Supply current (per channel)	IDD			1	mA	VO = 2.5 V, No load; full range	9
Slew rate at unity gain	SR	0.9	1.6		V/µs	VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ; 25°C	10
Supply current in shutdown (per channel)	IDD(SHDN)			3	µA	SHDN < 0.7 V, per channel in shutdown; full range	9

CAD (KiCad official)

Symbol: TLV2460IDR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tlv2460idr-etched.step / tlv2460idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2460idr.step / tlv2460idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (84 pp, sha256 25ffec4f86224962, retrieved 2026-10-11, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TLV2460IDR

**Texas Instruments** · Operational Amplifier · SOIC-8

TLV2460IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | IN− | input | Inverting input of the rail-to-rail input operational amplifier, whose common-mode range extends beyond the supply rails. |
| 3 | IN+ | input | Noninverting input of the rail-to-rail input operational amplifier, whose common-mode range extends beyond the supply rails. |
| 4 | GND | power_in | Ground (negative supply); all voltage values except differential voltages are referenced to it. |
| 5 | NC | unconnected | No internal connection. |
| 6 | OUT | output | Rail-to-rail output with ±80 mA drive capability, placed in a high-impedance state during shutdown. |
| 7 | VDD+ | power_in | Positive supply pin, 2.7 V to 6 V operation with an absolute maximum of 6 V. |
| 8 | SHDN | input | Shutdown input that places the amplifier in an ultralow supply current mode (0.3 µA/channel) with the output in high impedance. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, VDD | VDD |  |  | 6 | V |  | 6 |
| Differential input voltage | VID | -0.2 |  |  | V | Range −0.2 V to VDD + 0.2 V; upper limit not numeric | 6 |
| Input current (any input) | II | -200 |  | 200 | mA |  | 6 |
| Output current | IO | -175 |  | 175 | mA |  | 6 |
| Total input current (into VDD+) | II |  |  | 175 | mA | Into VDD+ | 6 |
| Total output current (out of GND) | IO |  |  | 175 | mA | Out of GND | 6 |
| Operating free-air temperature range | TA | -40 |  | 125 | °C | I suffix | 6 |
| Maximum junction temperature | TJ |  |  | 150 | °C |  | 6 |
| Storage temperature range | Tstg | -65 |  | 150 | °C |  | 6 |
| Lead temperature |  |  |  | 260 | °C | 1,6 mm (1/16 inch) from case for 10 seconds | 6 |
| Single supply voltage | VDD | 2.7 |  | 6 | V | Single supply | 7 |
| Split supply voltage | VDD | 1.35 |  | 3 | V | Split supply, ±1.35 V to ±3 V | 7 |
| Common-mode input voltage range | VICR | 0 |  |  | V | Maximum printed as VDD | 7 |
| Operating free-air temperature | TA | -40 |  | 125 | °C | I-suffix and Q-suffix | 7 |
| Shutdown on voltage level (high) | VIH | 2 |  |  | V | Relative to GND terminal | 7 |
| Shutdown off voltage level (low) | VIL |  |  | 0.7 | V | Relative to GND terminal | 7 |
| Junction-to-ambient thermal resistance, D (8) | θJA |  | 176 |  | °C/W | D (8) package; informational, not production tested | 6 |
| Junction-to-case thermal resistance, D (8) | θJC |  | 38.3 |  | °C/W | D (8) package; informational, not production tested | 6 |
| Input offset voltage | VIO |  | 500 | 2000 | µV | VDD = 3 V, VIC = 1.5 V; 25°C | 7 |
| Input offset voltage | VIO |  |  | 2200 | µV | VDD = 3 V, VIC = 1.5 V; full range | 7 |
| Input bias current | IIB |  | 4.4 | 14 | nA | VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω; 25°C | 7 |
| Input bias current | IIB |  |  | 75 | nA | I/Q/M suffix; full range | 7 |
| High-level output voltage | VOH | 2.7 |  |  | V | IOH = −10 mA; 25°C | 8 |
| Low-level output voltage | VOL |  |  | 0.1 | V | VIC = 1.5 V, IOL = 2.5 mA; 25°C | 8 |
| Low-level output voltage | VOL |  |  | 0.2 | V | VIC = 1.5 V, IOL = 2.5 mA; full range | 8 |
| Low-level output voltage | VOL |  |  | 0.3 | V | VIC = 1.5 V, IOL = 10 mA; 25°C | 8 |
| Input offset current | IIO |  | 2.8 | 7 | nA | VDD = 3 V, VIC = 1.5 V, VO = 1.5 V; 25°C | 7 |
| Short-circuit output current | IOS | 50 |  |  | mA | Sourcing; 25°C | 8 |
| Short-circuit output current | IOS | 40 |  |  | mA | Sinking; 25°C | 8 |
| Output current | IO | -40 |  | 40 | mA | Measured 1 V from rail; 25°C | 8 |
| Large-signal differential voltage amplification | AVD | 90 | 105 |  | dB | RL = 10 kΩ, VO(PP) = 1 V; 25°C | 7 |
| Common-mode rejection ratio | CMRR | 66 | 80 |  | dB | VICR = 0 to 3 V, RS = 50 Ω; 25°C | 7 |
| Supply voltage rejection ratio | kSVR | 80 | 85 |  | dB | VDD = 2.7 V to 6 V, VIC = VDD/2, No load; 25°C | 8 |
| Supply current (per channel) | IDD |  | 0.5 | 0.575 | mA | VO = 1.5 V, No load; 25°C | 8 |
| Supply current (per channel) | IDD |  |  | 0.9 | mA | VO = 1.5 V, No load; full range | 8 |
| Slew rate at unity gain | SR | 0.9 | 1.6 |  | V/µs | VO(PP) = 0.8 V, CL = 160 pF, RL = 10 kΩ; 25°C | 8 |
| Supply current in shutdown (per channel) | IDD(SHDN) |  |  | 2.5 | µA | SHDN < 0.7 V, per channel in shutdown; full range | 8 |
| Input offset voltage | VIO |  | 500 | 2000 | µV | VDD = 5 V, VIC = 2.5 V; 25°C | 9 |
| Input offset voltage | VIO |  |  | 2200 | µV | VDD = 5 V, VIC = 2.5 V; full range | 9 |
| Input bias current | IIB |  | 1.3 | 14 | nA | VIC = 2.5 V, VO = 2.5 V, RS = 50 Ω; 25°C | 9 |
| Input bias current | IIB |  |  | 60 | nA | I/Q/M suffix; full range | 9 |
| High-level output voltage | VOH | 4.9 |  |  | V | IOH = −2.5 mA; 25°C | 9 |
| High-level output voltage | VOH | 4.8 |  |  | V | IOH = −2.5 mA; full range | 9 |
| Low-level output voltage | VOL |  |  | 0.1 | V | VIC = 2.5 V, IOL = 2.5 mA; 25°C | 9 |
| Low-level output voltage | VOL |  |  | 0.2 | V | VIC = 2.5 V, IOL = 2.5 mA; full range | 9 |
| Input offset current | IIO |  | 0.3 | 7 | nA | VDD = 5 V, VIC = 2.5 V, VO = 2.5 V; 25°C | 9 |
| Short-circuit output current | IOS | 145 |  |  | mA | Sourcing; 25°C | 9 |
| Short-circuit output current | IOS | 100 |  |  | mA | Sinking; 25°C | 9 |
| Output current | IO | -80 |  | 80 | mA | Measured at 1 V from rail; 25°C | 9 |
| Large-signal differential voltage amplification | AVD | 92 | 109 |  | dB | VIC = 2.5 V, RL = 10 kΩ; 25°C | 9 |
| Common-mode rejection ratio | CMRR | 71 | 85 |  | dB | VICR = 0 V to 5 V, RS = 50 Ω; 25°C | 9 |
| Supply voltage rejection ratio | kSVR | 80 | 85 |  | dB | VDD = 2.7 V to 6 V, VIC = VDD/2, No load; 25°C | 9 |
| Supply current (per channel) | IDD |  | 0.55 | 0.65 | mA | VO = 2.5 V, No load; 25°C | 9 |
| Supply current (per channel) | IDD |  |  | 1 | mA | VO = 2.5 V, No load; full range | 9 |
| Slew rate at unity gain | SR | 0.9 | 1.6 |  | V/µs | VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ; 25°C | 10 |
| Supply current in shutdown (per channel) | IDD(SHDN) |  |  | 3 | µA | SHDN < 0.7 V, per channel in shutdown; full range | 9 |

## CAD (KiCad official)

- Symbol: `TLV2460IDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlv2460idr-etched.step` / `tlv2460idr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv2460idr.step` / `tlv2460idr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv2460.pdf) (84 pp, sha256 `25ffec4f86224962`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tlv2460idr-datasheet.pdf)