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TLV2454IPWR

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Texas Instruments Operational Amplifier, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV2454IPWR

Texas Instruments · Operational Amplifier · TSSOP-14

TLV2454IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1; the datasheet states the output can swing to within 250 mV of each supply rail while driving a 2.5-mA load, with ±10 mA output drive capability.
2 1IN− input Inverting input of amplifier 1; the common-mode input voltage range is 0 V to VDD.
3 1IN+ input Noninverting input of amplifier 1; the common-mode input voltage range is 0 V to VDD.
4 VDD+ power_in Positive supply; the recommended single-supply range is 2.7 V to 6 V (split supply ±1.35 V to ±3 V).
5 2IN+ input Noninverting input of amplifier 2; the common-mode input voltage range is 0 V to VDD.
6 2IN− input Inverting input of amplifier 2; the common-mode input voltage range is 0 V to VDD.
7 2OUT output Output of amplifier 2; the datasheet states the output can swing to within 250 mV of each supply rail while driving a 2.5-mA load, with ±10 mA output drive capability.
8 3OUT output Output of amplifier 3; the datasheet states the output can swing to within 250 mV of each supply rail while driving a 2.5-mA load, with ±10 mA output drive capability.
9 3IN− input Inverting input of amplifier 3; the common-mode input voltage range is 0 V to VDD.
10 3IN+ input Noninverting input of amplifier 3; the common-mode input voltage range is 0 V to VDD.
11 GND power_in Ground reference; all voltage values except differential voltages are specified with respect to GND.
12 4IN+ input Noninverting input of amplifier 4; the common-mode input voltage range is 0 V to VDD.
13 4IN− input Inverting input of amplifier 4; the common-mode input voltage range is 0 V to VDD.
14 4OUT output Output of amplifier 4; the datasheet states the output can swing to within 250 mV of each supply rail while driving a 2.5-mA load, with ±10 mA output drive capability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VIO 300 1500 µV VDD = 3 V; TA = 25°C 5
Input offset voltage VIO 2000 µV VDD = 3 V; full range (−40°C to 125°C, I suffix) 5
Input offset current IIO 0.3 4.5 nA VDD = 3 V; VIC = 0, RS = 50 Ω; TA = 25°C 5
Input offset current IIO 5.5 nA VDD = 3 V; VIC = 0, RS = 50 Ω; full range (−40°C to 125°C) 5
Input bias current IIB 0.9 5 nA VDD = 3 V; TA = 25°C 5
Input bias current IIB 7 nA VDD = 3 V; full range (−40°C to 125°C) 5
High-level output voltage VOH 2.85 2.95 V VDD = 3 V; VIC = 1.5 V, IOH = −500 µA; TA = 25°C 5
High-level output voltage VOH 2.83 V VDD = 3 V; VIC = 1.5 V, IOH = −500 µA; full range 5
Low-level output voltage VOL 0.09 0.16 V VDD = 3 V; VIC = 1.5 V, IOL = 500 µA; TA = 25°C 5
Low-level output voltage VOL 0.2 V VDD = 3 V; VIC = 1.5 V, IOL = 500 µA; full range 5
Short-circuit output current, sourcing IOS 4 12 mA VDD = 3 V; sourcing; TA = 25°C 5
Short-circuit output current, sourcing IOS 3 mA VDD = 3 V; sourcing; full range 5
Short-circuit output current, sinking IOS 2 7 mA VDD = 3 V; sinking; TA = 25°C 5
Short-circuit output current, sinking IOS 1 mA VDD = 3 V; sinking; full range 5
Large-signal differential voltage amplification AVD 96 110 dB VDD = 3 V; VO(PP) = 1 V, RL = 10 kΩ; TA = 25°C 5
Large-signal differential voltage amplification AVD 91 dB VDD = 3 V; VO(PP) = 1 V, RL = 10 kΩ; full range 5
Common-mode rejection ratio CMRR 70 80 dB VDD = 3 V; VIC = 0 to 3 V; TA = 25°C 5
Supply voltage rejection ratio kSVR 76 89 dB VDD = 2.7 V to 6 V; VIC = VDD/2, no load; TA = 25°C 5
Supply voltage rejection ratio kSVR 74 dB VDD = 2.7 V to 6 V; VIC = VDD/2, no load; full range 5
Supply voltage rejection ratio (ΔVDD/ΔVIO) ∆VDD/∆VIO 88 106 dB VDD = 3 V to 5 V; VIC = VDD/2, no load; TA = 25°C 5
Supply voltage rejection ratio (ΔVDD/ΔVIO) ∆VDD/∆VIO 84 dB VDD = 3 V to 5 V; VIC = VDD/2, no load; full range 5
Supply current (per channel) IDD 23 35 µA VDD = 3 V; VO = 1.5 V, no load; TA = 25°C 5
Supply current (per channel) IDD 45 µA VDD = 3 V; VO = 1.5 V, no load; full range (I suffix) 5
Slew rate at unity gain SR 0.05 0.11 V/µs VDD = 3 V; VO(PP) = 0.8 V, CL = 150 pF; TA = 25°C 6
Slew rate at unity gain SR 0.02 V/µs VDD = 3 V; VO(PP) = 0.8 V, RL = 10 kΩ, CL = 150 pF; full range 6
Input offset voltage VIO 300 1500 µV VDD = 5 V; TA = 25°C 7
Input offset voltage VIO 2000 µV VDD = 5 V; full range (−40°C to 125°C, I suffix) 7
Input offset current IIO 0.3 4.5 nA VDD = 5 V; VIC = 0, RS = 50 Ω; TA = 25°C 7
Input offset current IIO 5.5 nA VDD = 5 V; VIC = 0, RS = 50 Ω; full range (−40°C to 125°C) 7
Input bias current IIB 0.5 5 nA VDD = 5 V; TA = 25°C 7
Input bias current IIB 7 nA VDD = 5 V; full range (−40°C to 125°C) 7
High-level output voltage VOH 4.87 4.97 V VDD = 5 V; VIC = 2.5 V, IOH = −500 µA; TA = 25°C 7
High-level output voltage VOH 4.85 V VDD = 5 V; VIC = 2.5 V, IOH = −500 µA; full range 7
Low-level output voltage VOL 0.07 0.15 V VDD = 5 V; VIC = 2.5 V, IOL = 500 µA; TA = 25°C 7
Low-level output voltage VOL 0.16 V VDD = 5 V; VIC = 2.5 V, IOL = 500 µA; full range 7
Short-circuit output current, sourcing IOS 20 32 mA VDD = 5 V; sourcing; TA = 25°C 7
Short-circuit output current, sourcing IOS 18 mA VDD = 5 V; sourcing; full range 7
Short-circuit output current, sinking IOS 12 18 mA VDD = 5 V; sinking; TA = 25°C 7
Short-circuit output current, sinking IOS 10 mA VDD = 5 V; sinking; full range 7
Large-signal differential voltage amplification AVD 96 103 dB VDD = 5 V; VO(PP) = 3 V, RL = 10 kΩ; TA = 25°C 7
Large-signal differential voltage amplification AVD 91 dB VDD = 5 V; VO(PP) = 3 V, RL = 10 kΩ; full range 7
Common-mode rejection ratio CMRR 70 80 dB VDD = 5 V; VIC = 0 to 5 V; TA = 25°C 7
Supply voltage rejection ratio kSVR 76 89 dB VDD = 2.7 V to 6 V; VIC = VDD/2, no load; TA = 25°C 7
Supply voltage rejection ratio kSVR 74 dB VDD = 2.7 V to 6 V; VIC = VDD/2, no load; full range 7
Supply voltage rejection ratio (ΔVDD/ΔVIO) ∆VDD/∆VIO 88 106 dB VDD = 3 V to 5 V; VIC = VDD/2, no load; TA = 25°C 7
Supply voltage rejection ratio (ΔVDD/ΔVIO) ∆VDD/∆VIO 84 dB VDD = 3 V to 5 V; VIC = VDD/2, no load; full range 7
Supply current (per channel) IDD 23 42 µA VDD = 5 V; VO = 2.5 V, no load; TA = 25°C 7
Supply current (per channel) IDD 46 µA VDD = 5 V; VO = 2.5 V, no load; full range (I suffix) 7
Slew rate at unity gain SR 0.05 0.11 V/µs VDD = 5 V; VO(PP) = 2 V, CL = 150 pF; TA = 25°C 8
Slew rate at unity gain SR 0.02 V/µs VDD = 5 V; VO(PP) = 2 V, RL = 10 kΩ, CL = 150 pF; full range 8
Supply voltage, VDD (absolute maximum) VDD 7 V 4
Storage temperature range Tstg -65 150 °C 4
Maximum junction temperature TJ 150 °C 4
Supply voltage, VDD single supply VDD 2.7 6 V Single supply 4
Supply voltage, VDD split supply VDD 1.35 3 V Split supply, printed as ±1.35 V to ±3 V 4
Common-mode input voltage range VICR 0 V Maximum printed as VDD (no numeric value) 4
Operating free-air temperature, I suffix TA -40 125 °C I-suffix 4
Junction-to-ambient thermal resistance, PW (14) θJA 173.6 °C/W PW (14) package 4
Junction-to-case thermal resistance, PW (14) θJC 29.3 °C/W PW (14) package 4

CAD (KiCad official)

  • Symbol: TLV2454IPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: tlv2454ipwr-etched.step / tlv2454ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2454ipwr.step / tlv2454ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (69 pp, sha256 596f451da195d002, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF