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TLV2432AIDR
Public Made by Adomby adom
Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tlv2432aidr: specified limits as data (metadata.characteristics, 60 rows from the datasheet)
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TLV2432AIDR
Texas Instruments · Operational Amplifier · SOIC-8
TLV2432AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Channel 1 rail-to-rail output, able to drive 600 Ω loads. |
| 2 | 1IN− | input | Channel 1 inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 3 | 1IN+ | input | Channel 1 non-inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 4 | VDD−/GND | power_in | Negative supply or ground; supply voltage range is 2.7 V to 10 V total. |
| 5 | 2IN+ | input | Channel 2 non-inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 6 | 2IN− | input | Channel 2 inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 7 | 2OUT | output | Channel 2 rail-to-rail output, able to drive 600 Ω loads. |
| 8 | VDD+ | power_in | Positive supply; supply voltage range is 2.7 V to 10 V total. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage, 25 C (VDD = 3 V) | VIO | 300 | 950 | µV | VDD = 3 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±1.5 V; 25°C | 4 | |
| Input offset voltage, full range (VDD = 3 V) | VIO | 1500 | µV | VDD = 3 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±1.5 V; Full range | 4 | ||
| Input offset current, 25 C (VDD = 3 V) | IIO | 0.5 | 60 | pA | VDD = 3 V; 25°C | 4 | |
| Input offset current, full range (VDD = 3 V) | IIO | 150 | pA | VDD = 3 V; Full range | 4 | ||
| Input bias current, 25 C (VDD = 3 V) | IIB | 1 | 60 | pA | VDD = 3 V; 25°C | 4 | |
| Input bias current, full range (VDD = 3 V) | IIB | 150 | pA | VDD = 3 V; Full range | 4 | ||
| Common-mode input voltage range, 25 C (VDD = 3 V) | VICR | 0 | 2.5 | V | VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; 25°C | 4 | |
| Common-mode input voltage range, full range (VDD = 3 V) | VICR | 0 | 2.2 | V | VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; Full range | 4 | |
| High-level output voltage (VDD = 3 V) | VOH | 2.98 | V | VDD = 3 V; IOH = −100 µA; 25°C | 4 | ||
| High-level output voltage, 25 C (VDD = 3 V) | VOH | 2.5 | V | VDD = 3 V; IOH = −3 mA; 25°C | 4 | ||
| High-level output voltage, full range (VDD = 3 V) | VOH | 2.25 | V | VDD = 3 V; IOH = −3 mA; Full range | 4 | ||
| Low-level output voltage, 25 C (VDD = 3 V) | VOL | 0.02 | V | VDD = 3 V; VIC = 1.5 V, IOL = 100 µA; 25°C | 4 | ||
| Low-level output voltage, 25 C, 3 mA (VDD = 3 V) | VOL | 0.83 | V | VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; 25°C | 4 | ||
| Low-level output voltage, full range, 3 mA (VDD = 3 V) | VOL | 1 | V | VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; Full range | 4 | ||
| Large-signal differential voltage amplification, 25 C (VDD = 3 V) | AVD | 1.5 | 2.5 | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ (referenced to 2.5 V); 25°C | 4 | |
| Large-signal differential voltage amplification, full range, RL = 2 kΩ (VDD = 3 V) | AVD | 1 | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ; Full range | 4 | ||
| Large-signal differential voltage amplification, full range, RL = 1 MΩ (VDD = 3 V) | AVD | 750 | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 1 MΩ; Full range | 4 | ||
| Common-mode rejection ratio, 25 C (VDD = 3 V) | CMRR | 63 | 83 | dB | VDD = 3 V; VIC = 0 V to 2.5 V, VO = 1.5 V, RS = 50 Ω; 25°C | 4 | |
| Common-mode rejection ratio, full range (VDD = 3 V) | CMRR | 63 | dB | VDD = 3 V; VIC = 0 V to 2.5 V, VO = 1.5 V, RS = 50 Ω; Full range | 4 | ||
| Supply-voltage rejection ratio, 25 C (VDD = 3 V) | kSVR | 80 | 95 | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, no load; 25°C | 4 | |
| Supply-voltage rejection ratio, full range (VDD = 3 V) | kSVR | 80 | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, no load; Full range | 4 | ||
| Supply current per channel, 25 C (VDD = 3 V) | IDD | 115 | 150 | µA | VDD = 3 V; VO = 1.5 V, no load; 25°C | 4 | |
| Supply current per channel, full range (VDD = 3 V) | IDD | 175 | µA | VDD = 3 V; VO = 1.5 V, no load; Full range | 4 | ||
| Slew rate at unity gain, 25 C (VDD = 3 V) | SR | 0.15 | 0.25 | V/µs | VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; 25°C | 5 | |
| Slew rate at unity gain, full range (VDD = 3 V) | SR | 0.1 | V/µs | VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; Full range | 5 | ||
| Input offset voltage, 25 C (VDD = 5 V) | VIO | 300 | 950 | µV | VDD = 5 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±2.5 V; 25°C | 8 | |
| Input offset voltage, full range (VDD = 5 V) | VIO | 1500 | µV | VDD = 5 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±2.5 V; Full range | 8 | ||
| Input offset current, 25 C (VDD = 5 V) | IIO | 0.5 | 60 | pA | VDD = 5 V; 25°C | 8 | |
| Input offset current, full range (VDD = 5 V) | IIO | 150 | pA | VDD = 5 V; Full range | 8 | ||
| Input bias current, 25 C (VDD = 5 V) | IIB | 1 | 60 | pA | VDD = 5 V; 25°C | 8 | |
| Input bias current, full range (VDD = 5 V) | IIB | 150 | pA | VDD = 5 V; Full range | 8 | ||
| Common-mode input voltage range, 25 C (VDD = 5 V) | VICR | 0 | 4.5 | V | VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; 25°C | 8 | |
| Common-mode input voltage range, full range (VDD = 5 V) | VICR | 0 | 4.2 | V | VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; Full range | 8 | |
| High-level output voltage (VDD = 5 V) | VOH | 4.97 | V | VDD = 5 V; IOH = −100 µA; 25°C | 8 | ||
| High-level output voltage, 25 C, 5 mA (VDD = 5 V) | VOH | 4 | 4.35 | V | VDD = 5 V; IOH = −5 mA; 25°C | 8 | |
| High-level output voltage, full range, 5 mA (VDD = 5 V) | VOH | 4 | V | VDD = 5 V; IOH = −5 mA; Full range | 8 | ||
| Low-level output voltage, 25 C (VDD = 5 V) | VOL | 0.01 | V | VDD = 5 V; VIC = 2.5 V, IOL = 100 µA; 25°C | 8 | ||
| Low-level output voltage, 25 C, 5 mA (VDD = 5 V) | VOL | 0.8 | V | VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; 25°C | 8 | ||
| Low-level output voltage, full range, 5 mA (VDD = 5 V) | VOL | 1.25 | V | VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; Full range | 8 | ||
| Large-signal differential voltage amplification, 25 C, RL = 2 kΩ (VDD = 5 V) | AVD | 2.5 | 3.8 | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ (referenced to 2.5 V); 25°C | 8 | |
| Large-signal differential voltage amplification, full range, RL = 2 kΩ (VDD = 5 V) | AVD | 1.5 | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ; Full range | 8 | ||
| Large-signal differential voltage amplification, full range, RL = 1 MΩ (VDD = 5 V) | AVD | 950 | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 1 MΩ; Full range | 8 | ||
| Common-mode rejection ratio, 25 C (VDD = 5 V) | CMRR | 63 | 90 | dB | VDD = 5 V; VIC = 0 V to 4.5 V, VO = 2.5 V, RS = 50 Ω; 25°C | 8 | |
| Common-mode rejection ratio, full range (VDD = 5 V) | CMRR | 63 | dB | VDD = 5 V; VIC = 0 V to 4.5 V, VO = 2.5 V, RS = 50 Ω; Full range | 8 | ||
| Supply-voltage rejection ratio, 25 C (VDD = 5 V) | kSVR | 80 | 95 | dB | VDD = 4.4 V to 8 V, VIC = VDD/2, no load; 25°C | 8 | |
| Supply-voltage rejection ratio, full range (VDD = 5 V) | kSVR | 80 | dB | VDD = 4.4 V to 8 V, VIC = VDD/2, no load; Full range | 8 | ||
| Supply current per channel, 25 C (VDD = 5 V) | IDD | 115 | 150 | µA | VDD = 5 V; VO = 2.5 V, no load; 25°C | 8 | |
| Supply current per channel, full range (VDD = 5 V) | IDD | 175 | µA | VDD = 5 V; VO = 2.5 V, no load; Full range | 8 | ||
| Slew rate at unity gain, 25 C (VDD = 5 V) | SR | 0.15 | 0.25 | V/µs | VDD = 5 V; VO = 1.5 V to 3 V, RL = 2 kΩ, CL = 100 pF; 25°C | 9 | |
| Slew rate at unity gain, full range (VDD = 5 V) | SR | 0.1 | V/µs | VDD = 5 V; VO = 1.5 V to 3 V, RL = 2 kΩ, CL = 100 pF; Full range | 9 | ||
| Supply voltage | VDD | 12 | V | 3 | |||
| Input voltage range (any input) | VI | -0.3 | V | Maximum printed as vDD (not numeric) | 3 | ||
| Input current | II | -5 | 5 | mA | 3 | ||
| Output current | IO | -50 | 50 | mA | 3 | ||
| Total current into VDD+ | -50 | 50 | mA | 3 | |||
| Total current out of VDD− | -50 | 50 | mA | 3 | |||
| Operating free-air temperature (I suffix, dual) | TA | -40 | 85 | °C | I suffix (dual) | 3 | |
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Supply voltage (recommended) | VDD | 2.7 | 10 | V | I suffix (dual) | 3 | |
| Dissipation rating, D (8) package | 725 | mW | TA ≤ 25°C; derating 5.8 mW/°C above 25°C | 3 |
CAD (KiCad official)
- Symbol:
TLV2432AIDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tlv2432aidr-etched.step/tlv2432aidr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv2432aidr.step/tlv2432aidr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
988826ed84484eb0, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV2432AIDR
**Texas Instruments** · Operational Amplifier · SOIC-8
TLV2432AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Channel 1 rail-to-rail output, able to drive 600 Ω loads. |
| 2 | 1IN− | input | Channel 1 inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 3 | 1IN+ | input | Channel 1 non-inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 4 | VDD−/GND | power_in | Negative supply or ground; supply voltage range is 2.7 V to 10 V total. |
| 5 | 2IN+ | input | Channel 2 non-inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 6 | 2IN− | input | Channel 2 inverting input; common-mode range extends from VDD− to VDD+ − 1.3 V. |
| 7 | 2OUT | output | Channel 2 rail-to-rail output, able to drive 600 Ω loads. |
| 8 | VDD+ | power_in | Positive supply; supply voltage range is 2.7 V to 10 V total. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage, 25 C (VDD = 3 V) | VIO | | 300 | 950 | µV | VDD = 3 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±1.5 V; 25°C | 4 |
| Input offset voltage, full range (VDD = 3 V) | VIO | | | 1500 | µV | VDD = 3 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±1.5 V; Full range | 4 |
| Input offset current, 25 C (VDD = 3 V) | IIO | | 0.5 | 60 | pA | VDD = 3 V; 25°C | 4 |
| Input offset current, full range (VDD = 3 V) | IIO | | | 150 | pA | VDD = 3 V; Full range | 4 |
| Input bias current, 25 C (VDD = 3 V) | IIB | | 1 | 60 | pA | VDD = 3 V; 25°C | 4 |
| Input bias current, full range (VDD = 3 V) | IIB | | | 150 | pA | VDD = 3 V; Full range | 4 |
| Common-mode input voltage range, 25 C (VDD = 3 V) | VICR | 0 | | 2.5 | V | VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; 25°C | 4 |
| Common-mode input voltage range, full range (VDD = 3 V) | VICR | 0 | | 2.2 | V | VDD = 3 V; /VIO/ ≤ 5 mV, RS = 50 Ω; Full range | 4 |
| High-level output voltage (VDD = 3 V) | VOH | 2.98 | | | V | VDD = 3 V; IOH = −100 µA; 25°C | 4 |
| High-level output voltage, 25 C (VDD = 3 V) | VOH | 2.5 | | | V | VDD = 3 V; IOH = −3 mA; 25°C | 4 |
| High-level output voltage, full range (VDD = 3 V) | VOH | 2.25 | | | V | VDD = 3 V; IOH = −3 mA; Full range | 4 |
| Low-level output voltage, 25 C (VDD = 3 V) | VOL | | | 0.02 | V | VDD = 3 V; VIC = 1.5 V, IOL = 100 µA; 25°C | 4 |
| Low-level output voltage, 25 C, 3 mA (VDD = 3 V) | VOL | | | 0.83 | V | VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; 25°C | 4 |
| Low-level output voltage, full range, 3 mA (VDD = 3 V) | VOL | | | 1 | V | VDD = 3 V; VIC = 1.5 V, IOL = 3 mA; Full range | 4 |
| Large-signal differential voltage amplification, 25 C (VDD = 3 V) | AVD | 1.5 | 2.5 | | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ (referenced to 2.5 V); 25°C | 4 |
| Large-signal differential voltage amplification, full range, RL = 2 kΩ (VDD = 3 V) | AVD | 1 | | | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 2 kΩ; Full range | 4 |
| Large-signal differential voltage amplification, full range, RL = 1 MΩ (VDD = 3 V) | AVD | 750 | | | V/mV | VDD = 3 V; VIC = 2.5 V, VO = 1 V to 2 V, RL = 1 MΩ; Full range | 4 |
| Common-mode rejection ratio, 25 C (VDD = 3 V) | CMRR | 63 | 83 | | dB | VDD = 3 V; VIC = 0 V to 2.5 V, VO = 1.5 V, RS = 50 Ω; 25°C | 4 |
| Common-mode rejection ratio, full range (VDD = 3 V) | CMRR | 63 | | | dB | VDD = 3 V; VIC = 0 V to 2.5 V, VO = 1.5 V, RS = 50 Ω; Full range | 4 |
| Supply-voltage rejection ratio, 25 C (VDD = 3 V) | kSVR | 80 | 95 | | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, no load; 25°C | 4 |
| Supply-voltage rejection ratio, full range (VDD = 3 V) | kSVR | 80 | | | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, no load; Full range | 4 |
| Supply current per channel, 25 C (VDD = 3 V) | IDD | | 115 | 150 | µA | VDD = 3 V; VO = 1.5 V, no load; 25°C | 4 |
| Supply current per channel, full range (VDD = 3 V) | IDD | | | 175 | µA | VDD = 3 V; VO = 1.5 V, no load; Full range | 4 |
| Slew rate at unity gain, 25 C (VDD = 3 V) | SR | 0.15 | 0.25 | | V/µs | VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; 25°C | 5 |
| Slew rate at unity gain, full range (VDD = 3 V) | SR | 0.1 | | | V/µs | VDD = 3 V; VO = 1 V to 2 V, RL = 2 kΩ, CL = 100 pF; Full range | 5 |
| Input offset voltage, 25 C (VDD = 5 V) | VIO | | 300 | 950 | µV | VDD = 5 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±2.5 V; 25°C | 8 |
| Input offset voltage, full range (VDD = 5 V) | VIO | | | 1500 | µV | VDD = 5 V; VIC = 0 V, VO = 0 V, RS = 50 Ω, VDD± = ±2.5 V; Full range | 8 |
| Input offset current, 25 C (VDD = 5 V) | IIO | | 0.5 | 60 | pA | VDD = 5 V; 25°C | 8 |
| Input offset current, full range (VDD = 5 V) | IIO | | | 150 | pA | VDD = 5 V; Full range | 8 |
| Input bias current, 25 C (VDD = 5 V) | IIB | | 1 | 60 | pA | VDD = 5 V; 25°C | 8 |
| Input bias current, full range (VDD = 5 V) | IIB | | | 150 | pA | VDD = 5 V; Full range | 8 |
| Common-mode input voltage range, 25 C (VDD = 5 V) | VICR | 0 | | 4.5 | V | VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; 25°C | 8 |
| Common-mode input voltage range, full range (VDD = 5 V) | VICR | 0 | | 4.2 | V | VDD = 5 V; /VIO/ ≤ 5 mV, RS = 50 Ω; Full range | 8 |
| High-level output voltage (VDD = 5 V) | VOH | 4.97 | | | V | VDD = 5 V; IOH = −100 µA; 25°C | 8 |
| High-level output voltage, 25 C, 5 mA (VDD = 5 V) | VOH | 4 | 4.35 | | V | VDD = 5 V; IOH = −5 mA; 25°C | 8 |
| High-level output voltage, full range, 5 mA (VDD = 5 V) | VOH | 4 | | | V | VDD = 5 V; IOH = −5 mA; Full range | 8 |
| Low-level output voltage, 25 C (VDD = 5 V) | VOL | | | 0.01 | V | VDD = 5 V; VIC = 2.5 V, IOL = 100 µA; 25°C | 8 |
| Low-level output voltage, 25 C, 5 mA (VDD = 5 V) | VOL | | | 0.8 | V | VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; 25°C | 8 |
| Low-level output voltage, full range, 5 mA (VDD = 5 V) | VOL | | | 1.25 | V | VDD = 5 V; VIC = 2.5 V, IOL = 5 mA; Full range | 8 |
| Large-signal differential voltage amplification, 25 C, RL = 2 kΩ (VDD = 5 V) | AVD | 2.5 | 3.8 | | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ (referenced to 2.5 V); 25°C | 8 |
| Large-signal differential voltage amplification, full range, RL = 2 kΩ (VDD = 5 V) | AVD | 1.5 | | | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 2 kΩ; Full range | 8 |
| Large-signal differential voltage amplification, full range, RL = 1 MΩ (VDD = 5 V) | AVD | 950 | | | V/mV | VDD = 5 V; VIC = 2.5 V, VO = 1 V to 4 V, RL = 1 MΩ; Full range | 8 |
| Common-mode rejection ratio, 25 C (VDD = 5 V) | CMRR | 63 | 90 | | dB | VDD = 5 V; VIC = 0 V to 4.5 V, VO = 2.5 V, RS = 50 Ω; 25°C | 8 |
| Common-mode rejection ratio, full range (VDD = 5 V) | CMRR | 63 | | | dB | VDD = 5 V; VIC = 0 V to 4.5 V, VO = 2.5 V, RS = 50 Ω; Full range | 8 |
| Supply-voltage rejection ratio, 25 C (VDD = 5 V) | kSVR | 80 | 95 | | dB | VDD = 4.4 V to 8 V, VIC = VDD/2, no load; 25°C | 8 |
| Supply-voltage rejection ratio, full range (VDD = 5 V) | kSVR | 80 | | | dB | VDD = 4.4 V to 8 V, VIC = VDD/2, no load; Full range | 8 |
| Supply current per channel, 25 C (VDD = 5 V) | IDD | | 115 | 150 | µA | VDD = 5 V; VO = 2.5 V, no load; 25°C | 8 |
| Supply current per channel, full range (VDD = 5 V) | IDD | | | 175 | µA | VDD = 5 V; VO = 2.5 V, no load; Full range | 8 |
| Slew rate at unity gain, 25 C (VDD = 5 V) | SR | 0.15 | 0.25 | | V/µs | VDD = 5 V; VO = 1.5 V to 3 V, RL = 2 kΩ, CL = 100 pF; 25°C | 9 |
| Slew rate at unity gain, full range (VDD = 5 V) | SR | 0.1 | | | V/µs | VDD = 5 V; VO = 1.5 V to 3 V, RL = 2 kΩ, CL = 100 pF; Full range | 9 |
| Supply voltage | VDD | | | 12 | V | | 3 |
| Input voltage range (any input) | VI | -0.3 | | | V | Maximum printed as vDD (not numeric) | 3 |
| Input current | II | -5 | | 5 | mA | | 3 |
| Output current | IO | -50 | | 50 | mA | | 3 |
| Total current into VDD+ | | -50 | | 50 | mA | | 3 |
| Total current out of VDD− | | -50 | | 50 | mA | | 3 |
| Operating free-air temperature (I suffix, dual) | TA | -40 | | 85 | °C | I suffix (dual) | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| Supply voltage (recommended) | VDD | 2.7 | | 10 | V | I suffix (dual) | 3 |
| Dissipation rating, D (8) package | | | | 725 | mW | TA ≤ 25°C; derating 5.8 mW/°C above 25°C | 3 |
## CAD (KiCad official)
- Symbol: `TLV2432AIDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tlv2432aidr-etched.step` / `tlv2432aidr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv2432aidr.step` / `tlv2432aidr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv2432a.pdf) (42 pp, sha256 `988826ed84484eb0`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv2432aidr-datasheet.pdf)