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TLV2387DR

Public Made by Adom

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Texas Instruments Precision Op Amps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV2387DR

Texas Instruments · Precision Op Amps · SOIC-8

TLV2387DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of channel A; the datasheet specifies a rail-to-rail output that swings within 5 mV of the supplies under normal test conditions.
2 -IN A input Inverting input of channel A, with a common-mode input range that extends 100 mV beyond the supply rails.
3 +IN A input Noninverting input of channel A, with a common-mode input range that extends 100 mV beyond the supply rails.
4 V- power_in Negative (lowest) power supply; the device operates from 1.7 V to 5.5 V single-supply or ±0.85 V to ±2.75 V dual-supply.
5 +IN B input Noninverting input of channel B, with a common-mode input range that extends 100 mV beyond the supply rails.
6 -IN B input Inverting input of channel B, with a common-mode input range that extends 100 mV beyond the supply rails.
7 OUT B output Output of channel B; the datasheet specifies a rail-to-rail output that swings within 5 mV of the supplies under normal test conditions.
8 V+ power_in Positive (highest) power supply; the device operates from 1.7 V to 5.5 V single-supply or ±0.85 V to ±2.75 V dual-supply.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (VS = 5.5 V) VOS -5 1 5 µV VS = 5.5 V 7
Input offset voltage (VS = 1.7 V) VOS -6 1.25 6 µV VS = 1.7 V 7
Input offset voltage drift dVOS/dT -0.05 0.01 0.05 μV/°C 7
Input offset voltage drift (TA = -40°C to +125°C) dVOS/dT -0.05 0.01 0.05 μV/°C TA = -40°C to +125°C 7
Power supply rejection ratio PSRR -0.5 0.05 0.5 μV/V 7
Power supply rejection ratio PSRR -1 1 μV/V TA = -40°C to +125°C 7
Input bias current IB -300 60 300 pA 7
Input bias current IB -350 350 pA TA = -40°C to +125°C 7
Input offset current IOS -500 60 500 pA 7
Input offset current IOS -700 700 pA TA = -40°C to +125°C 7
Common-mode rejection ratio CMRR 115 138 dB (V-), 0.1 V < VCM < (V+), VS = 1.7 V 7
Common-mode rejection ratio CMRR 130 150 dB (V-), 0.2 V < VCM < (V+) + 0.1 V, VS = 5.5 V 7
Common-mode rejection ratio CMRR 110 132 dB (V-), 0.1 V < VCM < (V+), TA = -40°C to +125°C 7
Common-mode rejection ratio CMRR 130 dB (V-), 0.2 V < VCM < (V+) + 0.1, VS = 5.5 V, TA = -40°C to +125°C 7
Open-loop voltage gain AOL 120 145 dB (V-) + 100 mV < VOUT < (V+), 100 mV 7
Open-loop voltage gain AOL 115 dB (V-) + 100 mV < VOUT < (V+), 100 mV, TA = -40°C to +125°C 7
Open-loop voltage gain (RL = 2 kΩ) AOL 120 145 dB (V-) + 150 mV < VOUT < (V+), 150 mV, RL = 2 kΩ 7
Open-loop voltage gain (RL = 2 kΩ) AOL 115 dB (V-) + 150 mV < VOUT < (V+), 150 mV, RL = 2 kΩ, TA = -40°C to +125°C 7
Chopping clock frequency 100 150 kHz 8
Voltage output swing from rail 1 20 mV no load 8
Voltage output swing from rail 5 30 mV 8
Voltage output swing from rail 20 75 mV RL = 2 kΩ 8
Voltage output swing from rail 30 mV RL = 2 kΩ, TA = -40°C to +125°C 8
Short-circuit current ISC -55 55 mA VS = 5.5 V 8
Short-circuit current ISC -15 15 mA VS = 1.7 V 8
Quiescent current per amplifier IQ 570 675 μA IO = 0 mA 8
Quiescent current per amplifier IQ 700 μA TA = -40°C to 125°C 8
Turn-on time 25 100 μs VS = 5.5 V, VS ramp rate > 0.3 V/µs, settle to 1% 8
Absolute maximum supply voltage, single-supply VS 6 V Single-supply 5
Absolute maximum supply voltage, dual-supply VS 3 V Dual-supply 5
Absolute maximum input current, all pins -10 10 mA 5
Absolute maximum operating temperature range (TA) TA -55 150 °C Operating temperature 5
Absolute maximum junction temperature TJ -55 150 °C 5
Absolute maximum storage temperature Tstg -65 150 °C 5
ESD electrostatic discharge, human-body model V(ESD) -3000 3000 V Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 5
ESD electrostatic discharge, charged-device model V(ESD) -1000 1000 V Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002 5
Recommended supply voltage, single-supply VS 1.7 5.5 V Single-supply 5
Recommended supply voltage, dual-supply VS 0.85 2.75 V Dual-supply (±0.85 V min, ±2.75 V max as printed) 5
Specified temperature TA -40 125 °C 5
Junction-to-ambient thermal resistance RθJA 127.9 °C/W D (SOIC), 8 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 69.9 °C/W D (SOIC), 8 pins 6
Junction-to-board thermal resistance RθJB 71.4 °C/W D (SOIC), 8 pins 6
Junction-to-top characterization parameter ΨJT 21.5 °C/W D (SOIC), 8 pins 6
Junction-to-board characterization parameter ΨJB 70.7 °C/W D (SOIC), 8 pins 6

CAD (KiCad official)

  • Symbol: TLV2387DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tlv2387dr-etched.step / tlv2387dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2387dr.step / tlv2387dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 1be5f3e098d43beb, retrieved 2026-10-20, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF