Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TLV2375IDR

Texas Instruments · Operational Amplifier · SOIC-16

TLV2375IDR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of channel 1; absolute maximum output current is ±100 mA.
2 1IN- input Inverting input of channel 1; common-mode input voltage range is 0 V to VDD.
3 1IN+ input Noninverting input of channel 1; common-mode input voltage range is 0 V to VDD.
4 VDD power_in Positive power supply; single-supply operation from 2.7 V to 16 V (split supply ±1.35 V to ±8 V).
5 2IN+ input Noninverting input of channel 2; common-mode input voltage range is 0 V to VDD.
6 2IN- input Inverting input of channel 2; common-mode input voltage range is 0 V to VDD.
7 2OUT output Output of channel 2; absolute maximum output current is ±100 mA.
8 1/2SHDN input Shutdown control for channels 1 and 2, active low (can be left floating); turn-on requires at least 2 V and turn-off at most 0.8 V relative to GND.
9 3/4SHDN input Shutdown control for channels 3 and 4, active low (can be left floating); turn-on requires at least 2 V and turn-off at most 0.8 V relative to GND.
10 3OUT output Output of channel 3; absolute maximum output current is ±100 mA.
11 3IN- input Inverting input of channel 3; common-mode input voltage range is 0 V to VDD.
12 3IN+ input Noninverting input of channel 3; common-mode input voltage range is 0 V to VDD.
13 GND power_in Ground connection; all voltage values except differential voltages are referenced to GND.
14 4IN+ input Noninverting input of channel 4; common-mode input voltage range is 0 V to VDD.
15 4IN- input Inverting input of channel 4; common-mode input voltage range is 0 V to VDD.
16 4OUT output Output of channel 4; absolute maximum output current is ±100 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Amplifiers/Comparators
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 16.5 V 8
Input voltage VI -0.2 V all voltage values with respect to GND; upper limit printed as VDD + 0.2 8
Input current IIN -10 10 mA 8
Output current IO -100 100 mA 8
Operating free-air temperature TA -40 125 °C I-suffix 8
Maximum junction temperature TJ 150 °C 8
Storage temperature Tstg -65 150 °C 8
Supply voltage, single supply VDD 2.7 16 V single supply 8
Supply voltage, split supply VDD 1.35 8 V split supply, printed as ±1.35 and ±8 8
Common-mode input voltage VCM 0 V upper limit printed as VDD 8
Operating free-air temperature TA -40 125 °C I-suffix 8
Turnon voltage (shutdown pin) V(ON) 2 V relative to GND pin voltage 8
Turnoff voltage (shutdown pin) V(OFF) 0.8 V relative to GND pin voltage 8
Input offset voltage VOS 2 4.5 mV At TA = 25°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω 11
Input offset voltage VOS 6 mV At TA = –40°C to +125°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω 11
Common-mode rejection ratio CMRR 50 68 dB VDD = 2.7 V, RS = 50 Ω, VIC = 0 to VDD, TA = 25°C 11
Common-mode rejection ratio CMRR 49 dB VDD = 2.7 V, RS = 50 Ω, At TA = –40°C to +125°C, VIC = 0 to VDD 11
Common-mode rejection ratio CMRR 55 72 dB VDD = 5 V, RS = 50 Ω, VIC = 0 to VDD, TA = 25°C 11
Common-mode rejection ratio CMRR 54 dB VDD = 5 V, RS = 50 Ω, At TA = –40°C to +125°C, VIC = 0 to VDD 11
Common-mode rejection ratio CMRR 64 82 dB VDD = 15 V, RS = 50 Ω, VIC = 0 to VDD, TA = 25°C 11
Common-mode rejection ratio CMRR 63 dB VDD = 15 V, RS = 50 Ω, At TA = –40°C to +125°C, VIC = 0 to VDD 11
Large-signal differential voltage amplification AVD 98 106 dB VDD = 2.7 V, VO(PP) = VDD/2, RL = 10 kΩ, TA = 25°C 11
Large-signal differential voltage amplification AVD 76 dB VDD = 2.7 V, VO(PP) = VDD/2, RL = 10 kΩ, At TA = –40°C to +125°C 11
Large-signal differential voltage amplification AVD 100 110 dB VDD = 5 V, VO(PP) = VDD/2, RL = 10 kΩ, TA = 25°C 11
Large-signal differential voltage amplification AVD 86 dB VDD = 5 V, VO(PP) = VDD/2, RL = 10 kΩ, At TA = –40°C to +125°C 11
Large-signal differential voltage amplification AVD 81 83 dB VDD = 15 V, VO(PP) = VDD/2, RL = 10 kΩ, TA = 25°C 11
Large-signal differential voltage amplification AVD 79 dB VDD = 15 V, VO(PP) = VDD/2, RL = 10 kΩ, At TA = –40°C to +125°C 11
Input offset current IOS 1 60 pA VDD = 15 V, VIC = VO = VDD/2, TA = 25°C 11
Input offset current IOS 100 pA At TA = 70°C 11
Input offset current IOS 1000 pA At TA = 125°C 11
Input bias current IB 1 60 pA VDD = 15 V, VIC = VO = VDD/2, TA = 25°C 11
Input bias current IB 100 pA At TA = 70°C 11
Input bias current IB 1000 pA At TA = 125°C 11
High-level output voltage VOH 2.55 2.58 V VDD = 2.7 V, At TA = 25°C, VIC = VDD/2, IOH = −1 mA 12
High-level output voltage VOH 2.48 V VDD = 2.7 V, At TA = –40°C to +125°C, VIC = VDD/2, IOH = −1 mA 12
High-level output voltage VOH 4.9 4.93 V VDD = 5 V, At TA = 25°C, VIC = VDD/2, IOH = −1 mA 12
High-level output voltage VOH 4.85 V VDD = 5 V, At TA = –40°C to +125°C, VIC = VDD/2, IOH = −1 mA 12
High-level output voltage VOH 14.92 14.96 V VDD = 15 V, At TA = 25°C, VIC = VDD/2, IOH = −1 mA 12
High-level output voltage VOH 14.9 V VDD = 15 V, At TA = –40°C to +125°C, VIC = VDD/2, IOH = −1 mA 12
Low-level output voltage VOL 0.1 0.15 V VDD = 2.7 V, At TA = 25°C, VIC = VDD/2, IOL = 1 mA 12
Low-level output voltage VOL 0.22 V VDD = 2.7 V, At TA = –40°C to +125°C, VIC = VDD/2, IOL = 1 mA 12
Low-level output voltage VOL 0.05 0.1 V VDD = 5 V, At TA = 25°C, VIC = VDD/2, IOL = 1 mA 12
Low-level output voltage VOL 0.15 V VDD = 5 V, At TA = –40°C to +125°C, VIC = VDD/2, IOL = 1 mA 12
Low-level output voltage VOL 0.05 0.08 V VDD = 15 V, At TA = 25°C, VIC = VDD/2, IOL = 1 mA 12
Low-level output voltage VOL 0.1 V VDD = 15 V, At TA = –40°C to +125°C, VIC = VDD/2, IOL = 1 mA 12
Supply current (per channel) IDD 470 560 µA VDD = 2.7 V, VO = VDD/2 13
Supply current (per channel) IDD 550 660 µA VDD = 5 V, VO = VDD/2 13
Supply current (per channel) IDD 750 900 µA VDD = 15 V, VO = VDD/2, At TA = 25°C 13
Supply current (per channel) IDD 1200 µA VDD = 15 V, VO = VDD/2, At TA = –40°C to +125°C 13
Power-supply rejection ratio (ΔVDD/ΔVIO) PSRR 70 80 dB VDD = 2.7 V to 15 V, VIC = VDD/2, no load, At TA = 25°C 13
Power-supply rejection ratio (ΔVDD/ΔVIO) PSRR 65 dB VDD = 2.7 V to 15 V, VIC = VDD/2, no load, At TA = –40°C to +125°C 13
Supply current in shutdown mode (per channel) IDD(SHDN) 25 30 µA VDD = 2.7 V, 5 V, SHDN = 0 V, At TA = 25°C 14
Supply current in shutdown mode (per channel) IDD(SHDN) 35 µA VDD = 2.7 V, 5 V, SHDN = 0 V, At TA = –40°C to +125°C 14
Supply current in shutdown mode (per channel) IDD(SHDN) 40 45 µA VDD = 15 V, SHDN = 0 V, At TA = 25°C 14
Supply current in shutdown mode (per channel) IDD(SHDN) 50 µA VDD = 15 V, SHDN = 0 V, At TA = –40°C to +125°C 14
Junction-to-ambient thermal resistance (D SOIC, 16 pins) RθJA 83 °C/W D (SOIC) package, 16 pins 10
Junction-to-case (top) thermal resistance (D SOIC, 16 pins) RθJC(top) 44 °C/W D (SOIC) package, 16 pins 10
Junction-to-board thermal resistance (D SOIC, 16 pins) RθJB 40.5 °C/W D (SOIC) package, 16 pins 10

CAD (KiCad official)

  • Symbol: TLV2375IDR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: tlv2375idr-etched.step / tlv2375idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2375idr.step / tlv2375idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (67 pp, sha256 363aec9ae22e7914, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF