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README

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TLV2371IP

Texas Instruments · Operational Amplifier · PDIP-8

TLV2371IP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection on the PDIP/SOIC package; the pin can be left floating.
2 IN- input Negative (inverting) input; common-mode input voltage must stay within 0 V to VDD per the recommended operating conditions.
3 IN+ input Positive (noninverting) input; common-mode input voltage must stay within 0 V to VDD per the recommended operating conditions.
4 GND power_in Ground connection; all voltage values in the datasheet, except differential voltages, are referenced to this pin.
5 NC unconnected No internal connection on the PDIP/SOIC package; the pin can be left floating.
6 OUT output Amplifier output; output current is rated at ±100 mA maximum in the absolute maximum ratings.
7 VDD power_in Positive power supply; single-supply operation is specified from 2.7 V to 16 V (absolute maximum supply voltage 16.5 V).
8 NC unconnected No internal connection on the PDIP/SOIC package; the pin can be left floating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 16.5 V 9
Input voltage VI -0.2 V 9
Input current IIN -10 10 mA 9
Output current IO -100 100 mA 9
Operating free-air temperature, I-suffix TA -40 125 °C 9
Maximum junction temperature TJ 150 °C 9
Storage temperature Tstg -65 150 °C 9
Supply voltage, single supply VDD 2.7 16 V Single supply 9
Supply voltage, split supply VDD 1.35 8 V Split supply (±) 9
Common-mode input voltage VCM 0 V 9
Operating free-air temperature, I-suffix TA -40 125 °C 9
Input offset voltage VOS 2 4.5 mV At TA = 25°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω 12
Input offset voltage over temperature VOS 6 mV At TA = –40°C to +125°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω 12
Common-mode rejection ratio, 2.7 V CMRR 50 68 dB VDD = 2.7 V, RS = 50 Ω, VIC = 0 to VDD 12
Common-mode rejection ratio, 2.7 V, VIC to VDD − 1.35 V CMRR 56 70 dB VDD = 2.7 V, RS = 50 Ω, VIC = 0 to VDD − 1.35 V 12
Common-mode rejection ratio, 5 V CMRR 55 72 dB VDD = 5 V, RS = 50 Ω, VIC = 0 to VDD 12
Common-mode rejection ratio, 5 V, VIC to VDD − 1.35 V CMRR 67 80 dB VDD = 5 V, RS = 50 Ω, VIC = 0 to VDD − 1.35 V 12
Common-mode rejection ratio, 15 V CMRR 64 82 dB VDD = 15 V, RS = 50 Ω, VIC = 0 to VDD 12
Common-mode rejection ratio, 15 V, VIC to VDD − 1.35 V CMRR 67 84 dB VDD = 15 V, RS = 50 Ω, VIC = 0 to VDD − 1.35 V 12
Large-signal differential voltage amplification, 2.7 V AVD 98 106 dB VDD = 2.7 V, VO(PP) = VDD/2, RL = 10 kΩ 12
Large-signal differential voltage amplification, 5 V AVD 100 110 dB VDD = 5 V, VO(PP) = VDD/2, RL = 10 kΩ 12
Large-signal differential voltage amplification, 15 V AVD 81 83 dB VDD = 15 V, VO(PP) = VDD/2, RL = 10 kΩ 12
Input offset current IOS 1 60 pA VDD = 15 V, VIC = VO = VDD/2 12
Input offset current at 70 °C IOS 100 pA At TA = 70°C 12
Input offset current at 125 °C IOS 1000 pA At TA = 125°C 12
Input bias current IB 1 60 pA VDD = 15 V, VIC = VO = VDD/2 12
Input bias current at 70 °C IB 100 pA At TA = 70°C 12
Input bias current at 125 °C IB 1000 pA At TA = 125°C 12
Supply current (per channel), 2.7 V IDD 470 560 µA VDD = 2.7 V, VO = VDD/2 16
Supply current (per channel), 5 V IDD 550 660 µA VDD = 5 V, VO = VDD/2 16
Supply current (per channel), 15 V, 25 °C IDD 750 900 µA VDD = 15 V, VO = VDD/2, At TA = 25°C 16
Supply current (per channel), 15 V, over temperature IDD 1200 µA VDD = 15 V, VO = VDD/2, At TA = –40°C to +125°C 16
Power-supply rejection ratio, 25 °C PSRR 70 80 dB VDD = 2.7 V to 15 V, VIC = VDD/2, no load, At TA = 25°C 16
Power-supply rejection ratio, over temperature PSRR 65 dB VDD = 2.7 V to 15 V, VIC = VDD/2, no load, At TA = –40°C to +125°C 16
Slew rate at unity gain, 2.7 V, 25 °C SR 1.4 2 V/µs VDD = 2.7 V, At TA = 25°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 16
Slew rate at unity gain, 5 V, 25 °C SR 1.6 2.4 V/µs VDD = 5 V, At TA = 25°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 16
Slew rate at unity gain, 15 V, 25 °C SR 1.9 2.1 V/µs VDD = 15 V, At TA = 25°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 16
High-level output voltage, 2.7 V, IOH = −1 mA VOH 2.55 2.58 V VDD = 2.7 V, At TA = 25°C, VIC = VDD/2, IOH = −1 mA 14
High-level output voltage, 5 V, IOH = −1 mA VOH 4.9 4.93 V VDD = 5 V, At TA = 25°C, VIC = VDD/2, IOH = −1 mA 14
High-level output voltage, 15 V, IOH = −1 mA VOH 14.92 14.96 V VDD = 15 V, At TA = 25°C, VIC = VDD/2, IOH = −1 mA 14
High-level output voltage, 2.7 V, IOH = −5 mA VOH 1.9 2 V VDD = 2.7 V, At TA = 25°C, VIC = VDD/2, IOH = −5 mA 14
High-level output voltage, 5 V, IOH = −5 mA VOH 4.6 4.68 V VDD = 5 V, At TA = 25°C, VIC = VDD/2, IOH = −5 mA 14
High-level output voltage, 15 V, IOH = −5 mA VOH 14.7 14.8 V VDD = 15 V, At TA = 25°C, VIC = VDD/2, IOH = −5 mA 14
Low-level output voltage, 2.7 V, IOL = 1 mA VOL 0.1 0.15 V VDD = 2.7 V, At TA = 25°C, VIC = VDD/2, IOL = 1 mA 14
Low-level output voltage, 5 V, IOL = 1 mA VOL 0.05 0.1 V VDD = 5 V, At TA = 25°C, VIC = VDD/2, IOL = 1 mA 14
Low-level output voltage, 15 V, IOL = 1 mA VOL 0.05 0.08 V VDD = 15 V, At TA = 25°C, VIC = VDD/2, IOL = 1 mA 14
Low-level output voltage, 2.7 V, IOL = 5 mA VOL 0.52 0.7 V VDD = 2.7 V, At TA = 25°C, VIC = VDD/2, IOL = 5 mA 14
Low-level output voltage, 5 V, IOL = 5 mA VOL 0.28 0.4 V VDD = 5 V, At TA = 25°C, VIC = VDD/2, IOL = 5 mA 14
Low-level output voltage, 15 V, IOL = 5 mA VOL 0.19 0.3 V VDD = 15 V, At TA = 25°C, VIC = VDD/2, IOL = 5 mA 14
Output current, 2.7 V, positive rail IO 4 mA VDD = 2.7 V, VO = 0.5 V from rail, Positive rail 15
Output current, 2.7 V, negative rail IO 5 mA VDD = 2.7 V, VO = 0.5 V from rail, Negative rail 15
Output current, 5 V, positive rail IO 7 mA VDD = 5 V, VO = 0.5 V from rail, Positive rail 15
Output current, 5 V, negative rail IO 8 mA VDD = 5 V, VO = 0.5 V from rail, Negative rail 15
Output current, 15 V, positive rail IO 16 mA VDD = 15 V, VO = 0.5 V from rail, Positive rail 15
Output current, 15 V, negative rail IO 15 mA VDD = 15 V, VO = 0.5 V from rail, Negative rail 15
Thermal resistance, junction-to-ambient (PDIP-8, P) RθJA 49.2 °C/W 10
Thermal resistance, junction-to-case (top) (PDIP-8, P) RθJC(top) 39.4 °C/W 10
Thermal resistance, junction-to-board (PDIP-8, P) RθJB 26.4 °C/W 10
Junction-to-top characterization parameter (PDIP-8, P) ψJT 15.4 °C/W 10
Junction-to-board characterization parameter (PDIP-8, P) ψJB 26.3 °C/W 10

CAD (KiCad official)

  • Symbol: TLV2371IP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: tlv2371ip-etched.step / tlv2371ip-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2371ip.step / tlv2371ip.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (70 pp, sha256 c3fbd107aa31bde1, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF