component
TLV2264AIDR
Public Made by Adomby adom
Texas Instruments Operational Amplifier, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TLV2264AIDR
Texas Instruments · Operational Amplifier · SOIC-14
TLV2264AIDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of amplifier 1, which swings to both supply rails per the datasheet features. |
| 2 | 1IN− | input | Inverting input of amplifier 1. |
| 3 | 1IN+ | input | Non-inverting input of amplifier 1; the common-mode input range includes the negative rail. |
| 4 | VDD+ | power_in | Positive supply rail; the datasheet specifies a supply range of 2.7 V to 8 V. |
| 5 | 2IN+ | input | Non-inverting input of amplifier 2. |
| 6 | 2IN− | input | Inverting input of amplifier 2. |
| 7 | 2OUT | output | Output of amplifier 2, which swings to both supply rails per the datasheet features. |
| 8 | 3OUT | output | Output of amplifier 3, which swings to both supply rails per the datasheet features. |
| 9 | 3IN− | input | Inverting input of amplifier 3. |
| 10 | 3IN+ | input | Non-inverting input of amplifier 3. |
| 11 | VDD−/GND | power_in | Negative supply rail (VDD−/GND); serves as ground in single-supply operation. |
| 12 | 4IN+ | input | Non-inverting input of amplifier 4. |
| 13 | 4IN− | input | Inverting input of amplifier 4. |
| 14 | 4OUT | output | Output of amplifier 4, which swings to both supply rails per the datasheet features. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Amplifiers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | 300 | 950 | µV | TA = 25°C | 10 | |
| Input offset voltage | VIO | 1500 | µV | Full range (−40°C to 125°C) | 10 | ||
| Input offset current | IIO | 0.5 | 60 | pA | TA = 25°C, VIC = 0, VO = 0, RS = 50 Ω | 10 | |
| Input offset current | IIO | 150 | pA | TA = 85°C | 10 | ||
| Input offset current | IIO | 800 | pA | Full range (−40°C to 125°C) | 10 | ||
| Input bias current | IIB | 1 | 60 | pA | TA = 25°C | 10 | |
| Input bias current | IIB | 150 | pA | TA = 85°C | 10 | ||
| Input bias current | IIB | 800 | pA | Full range (−40°C to 125°C) | 10 | ||
| Common-mode input voltage range | VICR | -0.3 | 2.2 | V | TA = 25°C, RS = 50 Ω, /VIO/ ≤ 5 mV, VDD = 3 V | 10 | |
| Common-mode input voltage range | VICR | 0 | 1.7 | V | Full range, RS = 50 Ω, /VIO/ ≤ 5 mV, VDD = 3 V | 10 | |
| High-level output voltage | VOH | 2.99 | V | IOH = −20 µA, TA = 25°C, VDD = 3 V | 10 | ||
| High-level output voltage | VOH | 2.85 | V | IOH = −100 µA, TA = 25°C, VDD = 3 V | 10 | ||
| High-level output voltage | VOH | 2.7 | V | IOH = −400 µA, TA = 25°C, VDD = 3 V | 10 | ||
| Low-level output voltage | VOL | 10 | mV | VIC = 1.5 V, IOL = 50 µA, TA = 25°C, VDD = 3 V | 10 | ||
| Low-level output voltage | VOL | 100 | mV | VIC = 1.5 V, IOL = 500 µA, TA = 25°C, VDD = 3 V | 10 | ||
| Low-level output voltage | VOL | 150 | mV | VIC = 1.5 V, IOL = 500 µA, Full range, VDD = 3 V | 10 | ||
| Low-level output voltage | VOL | 200 | mV | VIC = 1.5 V, IOL = 1 µA, TA = 25°C, VDD = 3 V | 10 | ||
| Low-level output voltage | VOL | 300 | mV | VIC = 1.5 V, IOL = 1 µA, Full range, VDD = 3 V | 10 | ||
| Large-signal differential voltage amplification | AVD | 60 | 100 | V/mV | VIC = 1.5 V, RL = 50 kΩ, TA = 25°C, VDD = 3 V | 10 | |
| Large-signal differential voltage amplification | AVD | 30 | V/mV | VIC = 1.5 V, VO = 1 V to 2 V, RL = 50 kΩ, Full range, VDD = 3 V | 10 | ||
| Common-mode rejection ratio | CMRR | 65 | 77 | dB | VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 Ω, TA = 25°C, VDD = 3 V | 10 | |
| Common-mode rejection ratio | CMRR | 60 | dB | VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 Ω, Full range, VDD = 3 V | 10 | ||
| Supply voltage rejection ratio | kSVR | 80 | 100 | dB | VDD = 2.7 V to 8 V, TA = 25°C | 10 | |
| Supply voltage rejection ratio | kSVR | 80 | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, No load, Full range | 10 | ||
| Supply current (four amplifiers) | IDD | 0.8 | 1 | mA | VO = 1.5 V, No load, TA = 25°C, VDD = 3 V | 11 | |
| Supply current (four amplifiers) | IDD | 1 | mA | VO = 1.5 V, No load, Full range, VDD = 3 V | 11 | ||
| Slew rate at unity gain | SR | 0.35 | 0.55 | V/µs | VO = 0.7 V to 1.7 V, RL = 50 kΩ, TA = 25°C, VDD = 3 V | 11 | |
| Slew rate at unity gain | SR | 0.3 | V/µs | VO = 0.7 V to 1.7 V, CL = 100 pF, RL = 50 kΩ, Full range, VDD = 3 V | 11 | ||
| Equivalent input noise voltage | Vn | 43 | nV/√Hz | f = 10 Hz, TA = 25°C, VDD = 3 V | 11 | ||
| Equivalent input noise voltage | Vn | 12 | nV/√Hz | f = 1 kHz, TA = 25°C, VDD = 3 V | 11 | ||
| Gain-bandwidth product | 0.67 | MHz | f = 1 kHz, RL = 50 kΩ, TA = 25°C, VDD = 3 V | 11 | |||
| Phase margin at unity gain | φm | 55 | ° | RL = 50 kΩ, CL = 100 pF, TA = 25°C, VDD = 3 V | 11 | ||
| Input offset voltage | VIO | 300 | 950 | µV | TA = 25°C, VDD = 5 V | 8 | |
| Slew rate at unity gain | SR | 0.35 | 0.55 | V/µs | VO = 1.4 V to 2.6 V, RL = 50 kΩ, TA = 25°C, VDD = 5 V | 13 | |
| Low-level output voltage | VOL | 0.09 | 0.15 | V | VIC = 2.5 V, IOL = 500 µA, TA = 25°C, VDD = 5 V | 12 | |
| High-level output voltage | VOH | 4.85 | 4.94 | V | IOH = −100 µA, TA = 25°C, VDD = 5 V | 12 | |
| Supply current (four amplifiers) | IDD | 0.8 | 1 | mA | VO = 2.5 V, No load, TA = 25°C, VDD = 5 V | 13 | |
| Recommended operating supply voltage | VDD | 2.7 | 8 | V | I suffix | 5 | |
| Recommended operating free-air temperature | TA | -40 | 125 | °C | I suffix | 5 | |
| Supply voltage | VDD | 16 | V | Absolute maximum | 5 | ||
| Input current (each input) | II | -5 | 5 | mA | Each input | 5 | |
| Output current | IO | -50 | 50 | mA | Absolute maximum | 5 | |
| Operating free-air temperature range | TA | -40 | 125 | °C | I suffix | 5 | |
| Storage temperature range | Tstg | -65 | 150 | °C | Absolute maximum | 5 | |
| Power rating (D-14 package) | PD | 950 | mW | D-14 package, TA ≤ 25°C | 5 | ||
| Derating factor (D-14 package) | 7.6 | mW/°C | D-14 package, above TA = 25°C | 5 |
CAD (KiCad official)
- Symbol:
TLV2264AIDR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
tlv2264aidr-etched.step/tlv2264aidr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv2264aidr.step/tlv2264aidr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (70 pp, sha256
2773bab46edcaf7a, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TLV2264AIDR
**Texas Instruments** · Operational Amplifier · SOIC-14
TLV2264AIDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OUT | output | Output of amplifier 1, which swings to both supply rails per the datasheet features. |
| 2 | 1IN− | input | Inverting input of amplifier 1. |
| 3 | 1IN+ | input | Non-inverting input of amplifier 1; the common-mode input range includes the negative rail. |
| 4 | VDD+ | power_in | Positive supply rail; the datasheet specifies a supply range of 2.7 V to 8 V. |
| 5 | 2IN+ | input | Non-inverting input of amplifier 2. |
| 6 | 2IN− | input | Inverting input of amplifier 2. |
| 7 | 2OUT | output | Output of amplifier 2, which swings to both supply rails per the datasheet features. |
| 8 | 3OUT | output | Output of amplifier 3, which swings to both supply rails per the datasheet features. |
| 9 | 3IN− | input | Inverting input of amplifier 3. |
| 10 | 3IN+ | input | Non-inverting input of amplifier 3. |
| 11 | VDD−/GND | power_in | Negative supply rail (VDD−/GND); serves as ground in single-supply operation. |
| 12 | 4IN+ | input | Non-inverting input of amplifier 4. |
| 13 | 4IN− | input | Inverting input of amplifier 4. |
| 14 | 4OUT | output | Output of amplifier 4, which swings to both supply rails per the datasheet features. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Amplifiers |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VIO | | 300 | 950 | µV | TA = 25°C | 10 |
| Input offset voltage | VIO | | | 1500 | µV | Full range (−40°C to 125°C) | 10 |
| Input offset current | IIO | | 0.5 | 60 | pA | TA = 25°C, VIC = 0, VO = 0, RS = 50 Ω | 10 |
| Input offset current | IIO | | | 150 | pA | TA = 85°C | 10 |
| Input offset current | IIO | | | 800 | pA | Full range (−40°C to 125°C) | 10 |
| Input bias current | IIB | | 1 | 60 | pA | TA = 25°C | 10 |
| Input bias current | IIB | | | 150 | pA | TA = 85°C | 10 |
| Input bias current | IIB | | | 800 | pA | Full range (−40°C to 125°C) | 10 |
| Common-mode input voltage range | VICR | -0.3 | | 2.2 | V | TA = 25°C, RS = 50 Ω, /VIO/ ≤ 5 mV, VDD = 3 V | 10 |
| Common-mode input voltage range | VICR | 0 | | 1.7 | V | Full range, RS = 50 Ω, /VIO/ ≤ 5 mV, VDD = 3 V | 10 |
| High-level output voltage | VOH | 2.99 | | | V | IOH = −20 µA, TA = 25°C, VDD = 3 V | 10 |
| High-level output voltage | VOH | 2.85 | | | V | IOH = −100 µA, TA = 25°C, VDD = 3 V | 10 |
| High-level output voltage | VOH | 2.7 | | | V | IOH = −400 µA, TA = 25°C, VDD = 3 V | 10 |
| Low-level output voltage | VOL | | | 10 | mV | VIC = 1.5 V, IOL = 50 µA, TA = 25°C, VDD = 3 V | 10 |
| Low-level output voltage | VOL | | | 100 | mV | VIC = 1.5 V, IOL = 500 µA, TA = 25°C, VDD = 3 V | 10 |
| Low-level output voltage | VOL | | | 150 | mV | VIC = 1.5 V, IOL = 500 µA, Full range, VDD = 3 V | 10 |
| Low-level output voltage | VOL | | | 200 | mV | VIC = 1.5 V, IOL = 1 µA, TA = 25°C, VDD = 3 V | 10 |
| Low-level output voltage | VOL | | | 300 | mV | VIC = 1.5 V, IOL = 1 µA, Full range, VDD = 3 V | 10 |
| Large-signal differential voltage amplification | AVD | 60 | 100 | | V/mV | VIC = 1.5 V, RL = 50 kΩ, TA = 25°C, VDD = 3 V | 10 |
| Large-signal differential voltage amplification | AVD | 30 | | | V/mV | VIC = 1.5 V, VO = 1 V to 2 V, RL = 50 kΩ, Full range, VDD = 3 V | 10 |
| Common-mode rejection ratio | CMRR | 65 | 77 | | dB | VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 Ω, TA = 25°C, VDD = 3 V | 10 |
| Common-mode rejection ratio | CMRR | 60 | | | dB | VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 Ω, Full range, VDD = 3 V | 10 |
| Supply voltage rejection ratio | kSVR | 80 | 100 | | dB | VDD = 2.7 V to 8 V, TA = 25°C | 10 |
| Supply voltage rejection ratio | kSVR | 80 | | | dB | VDD = 2.7 V to 8 V, VIC = VDD/2, No load, Full range | 10 |
| Supply current (four amplifiers) | IDD | | 0.8 | 1 | mA | VO = 1.5 V, No load, TA = 25°C, VDD = 3 V | 11 |
| Supply current (four amplifiers) | IDD | | | 1 | mA | VO = 1.5 V, No load, Full range, VDD = 3 V | 11 |
| Slew rate at unity gain | SR | | 0.35 | 0.55 | V/µs | VO = 0.7 V to 1.7 V, RL = 50 kΩ, TA = 25°C, VDD = 3 V | 11 |
| Slew rate at unity gain | SR | 0.3 | | | V/µs | VO = 0.7 V to 1.7 V, CL = 100 pF, RL = 50 kΩ, Full range, VDD = 3 V | 11 |
| Equivalent input noise voltage | Vn | | 43 | | nV/√Hz | f = 10 Hz, TA = 25°C, VDD = 3 V | 11 |
| Equivalent input noise voltage | Vn | | 12 | | nV/√Hz | f = 1 kHz, TA = 25°C, VDD = 3 V | 11 |
| Gain-bandwidth product | | | 0.67 | | MHz | f = 1 kHz, RL = 50 kΩ, TA = 25°C, VDD = 3 V | 11 |
| Phase margin at unity gain | φm | | 55 | | ° | RL = 50 kΩ, CL = 100 pF, TA = 25°C, VDD = 3 V | 11 |
| Input offset voltage | VIO | | 300 | 950 | µV | TA = 25°C, VDD = 5 V | 8 |
| Slew rate at unity gain | SR | | 0.35 | 0.55 | V/µs | VO = 1.4 V to 2.6 V, RL = 50 kΩ, TA = 25°C, VDD = 5 V | 13 |
| Low-level output voltage | VOL | | 0.09 | 0.15 | V | VIC = 2.5 V, IOL = 500 µA, TA = 25°C, VDD = 5 V | 12 |
| High-level output voltage | VOH | 4.85 | 4.94 | | V | IOH = −100 µA, TA = 25°C, VDD = 5 V | 12 |
| Supply current (four amplifiers) | IDD | | 0.8 | 1 | mA | VO = 2.5 V, No load, TA = 25°C, VDD = 5 V | 13 |
| Recommended operating supply voltage | VDD | 2.7 | | 8 | V | I suffix | 5 |
| Recommended operating free-air temperature | TA | -40 | | 125 | °C | I suffix | 5 |
| Supply voltage | VDD | | | 16 | V | Absolute maximum | 5 |
| Input current (each input) | II | -5 | | 5 | mA | Each input | 5 |
| Output current | IO | -50 | | 50 | mA | Absolute maximum | 5 |
| Operating free-air temperature range | TA | -40 | | 125 | °C | I suffix | 5 |
| Storage temperature range | Tstg | -65 | | 150 | °C | Absolute maximum | 5 |
| Power rating (D-14 package) | PD | | | 950 | mW | D-14 package, TA ≤ 25°C | 5 |
| Derating factor (D-14 package) | | | 7.6 | | mW/°C | D-14 package, above TA = 25°C | 5 |
## CAD (KiCad official)
- Symbol: `TLV2264AIDR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `tlv2264aidr-etched.step` / `tlv2264aidr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv2264aidr.step` / `tlv2264aidr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv2264a.pdf) (70 pp, sha256 `2773bab46edcaf7a`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tlv2264aidr-datasheet.pdf)