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README

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TLV1841DBVR

Texas Instruments · Comparators · SOT-23-5

TLV1841DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Open-drain comparator output that can be pulled up to 40V recommended (absolute max 42V from V-) independent of V+.
2 V- power_in Negative supply voltage; supply range VS = (V+) - (V-) is 2.7V to 40V.
3 IN+ input Non-inverting (+) input with rail-to-rail range of (V-) -0.2V to (V+) + 0.2V.
4 IN- input Inverting (-) input with rail-to-rail range of (V-) -0.2V to (V+) + 0.2V.
5 V+ power_in Positive supply voltage; supply range VS = (V+) - (V-) is 2.7V to 40V (absolute max 42V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Amplifiers/Comparators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VS -0.3 42 V VS = (V+), (V-) 6
Input pins voltage -0.3 0.3 V IN+, IN- from (V-); max is (V+) + 0.3 6
Current into input pins -10 10 mA IN+, IN- 6
Output voltage open-drain -0.3 42 V OUT (open-drain) from (V-) 6
Output short circuit current -10 10 mA 6
Junction temperature TJ 150 °C 6
Storage temperature Tstg -65 150 °C 6
ESD HBM V(ESD) -2000 2000 V Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 6
ESD CDM V(ESD) -1000 1000 V Charged-device model (CDM), per JEDEC specification JESD22-C101 6
Junction-to-ambient thermal resistance RqJA 183.6 °C/W DBV (SOT-23) 5 pins 6
Junction-to-case (top) thermal resistance RqJC(top) 81.1 °C/W DBV (SOT-23) 5 pins 6
Junction-to-board thermal resistance RqJB 50.4 °C/W DBV (SOT-23) 5 pins 6
Junction-to-top characterization parameter yJT 18.4 °C/W DBV (SOT-23) 5 pins 6
Junction-to-board characterization parameter yJB 50 °C/W DBV (SOT-23) 5 pins 6
Supply voltage VS 2.7 40 V VS = (V+), (V-) 6
Input voltage range -0.2 0.2 V from (V-); max is (V+) + 0.2 6
Output voltage for open drain -0.2 40 V 6
Ambient temperature TA -40 125 °C 6
Input offset voltage VOS -2.5 0.3 2.5 mV TA = 25°C 7
Input offset voltage VOS -3 3 mV TA = -40°C to +125°C 7
Input offset voltage drift dVIO/dT 1.2 µV/°C TA = -40°C to +125°C 7
Quiescent current per comparator, output high IQ 75 100 µA No Load, Output High TA = 25°C, TLV1831, TLV1841 7
Quiescent current per comparator, output high IQ 105 µA No Load, Output High TA = -40°C to +125°C, TLV1831, TLV1841 7
Quiescent current per comparator, output low IQ 100 135 µA No Load, Output Low TA = 25°C, TLV1831, TLV1841 7
Quiescent current per comparator, output low IQ 140 µA No Load, Output Low TA = -40°C to +125°C, TLV1831, TLV1841 7
Power-on reset voltage VPOR 1.9 V 7
Input bias current IB 500 pA 7
Input bias current IB -5 5 nA TA = -40°C to +125°C 7
Input offset current IOS 10 pA 7
Input capacitance, differential CID 5 pF 7
Input capacitance, common mode CIC 5 pF 7
Common-mode voltage range VCM-Range -0.2 0.2 V VS = 2.7V to 40V, TA = -40°C to +125°C; (V-), 0.2 to (V+) + 0.2 7
Output voltage swing from (V-) VOL 400 mV ISINK = 4mA, TA = -40°C to +125°C 7
Open-drain output leakage current ILKG 3 70 nA VID = +0.1V, VPULLUP = (V+), TA = -40°C to +125°C 7
Short-circuit current, sinking IOL 30 mA Sinking, TA = -40°C to +125°C 7
Propagation delay time, high-to-low TPD-HL 110 ns VOD = 10mV, VUD = 100mV, VPU = 5V and RPU = 10k (open-drain output only) 8
Propagation delay time, high-to-low TPD-HL 65 ns VOD = 100mV, VUD = 100mV, VPU = 5V and RPU = 10k (open-drain output only) 8
Output fall time, 80% to 20% TFALL 5 ns VOD = 100mV, VUD = 100mV 8
Toggle frequency FTOGGLE 7.5 MHz VID = 200mV 8
Power on-time PON 80 µs 8

CAD (KiCad official)

  • Symbol: TLV1841DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv1841dbvr-etched.step / tlv1841dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv1841dbvr.step / tlv1841dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 b4e8291f252d6c74, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF