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TLV1821QDBVRQ1

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Texas Instruments Comparators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV1821QDBVRQ1

Texas Instruments · Comparators · SOT-23-5

TLV1821QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Open-drain comparator output (TLV1821-Q1) that can be pulled up to 40V independent of the supply voltage.
2 V- power_in Negative supply voltage pin, with total supply VS = (V+) - (V-) of 2.4V to 40V.
3 IN+ input Non-inverting (+) comparator input with rail-to-rail range from 0.2V below V- to 0.2V above V+.
4 IN- input Inverting (-) comparator input with rail-to-rail range from 0.2V below V- to 0.2V above V+.
5 V+ power_in Positive supply voltage pin, with total supply VS = (V+) - (V-) of 2.4V to 40V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Amplifiers/Comparators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -3 0.5 3 mV VS = 12V, VCM = VS/2, TA = 25°C 8
Input offset voltage over temperature VOS -4 4 mV TA = -40°C to +125°C 8
Quiescent current per comparator, output low IQ 6 7.5 µA No Load, Output Low, TA = 25°C 8
Quiescent current per comparator, output low, over temperature IQ 8.5 µA No Load, Output Low, TA = -40°C to +125°C 8
Quiescent current per comparator, output high IQ 7 9 µA No Load, Output High, TA = 25°C 8
Quiescent current per comparator, output high, over temperature IQ 10 µA No Load, Output High, TA = -40°C to +125°C 8
Input bias current over temperature IB -1.2 1.2 nA TA = -40°C to +125°C 8
Common-mode voltage range lower limit (relative to V-) VCM-Range -0.2 V VS = 2.4V to 40V, TA = -40°C to +125°C, (V-), 0.2 8
Common-mode voltage range upper limit (relative to V+) VCM-Range 0.2 V VS = 2.4V to 40V, TA = -40°C to +125°C, (V+) + 0.2 8
Output voltage swing from (V-) VOL 250 mV ISINK = 4mA, TA = -40°C to +125°C 8
Open-drain output leakage current ILKG 0.1 nA VID = +0.1V, VPULLUP = (V+), TA = -40°C to +125°C 8
Short-circuit current, sinking IOL 15 30 mA Sinking 8
Input offset voltage drift dVIO/dT 1.2 µV/°C TA = -40°C to +125°C 8
Power supply rejection ratio PSRR 100 dB VS = 2.4V to 40V, VCM = (V-) 8
Power-on reset voltage VPOR 1.7 V 8
Input bias current IB 150 fA 8
Input offset current IOS 10 fA 8
Input capacitance, differential CID 2 pF 8
Input capacitance, common mode CIC 8 pF 8
Propagation delay time, high-to-low TPD-HL 900 ns VOD = 10mV, CL = 50pF 9
Propagation delay time, high-to-low TPD-HL 450 ns VOD = 100mV, CL = 50pF 9
Output fall time, 80% to 20% TFALL 15 ns CL = 50pF 9
Toggle frequency FTOGGLE 500 kHz VID = 100mV, CL = 50pF 9
Power on-time PON 200 µs 9
Supply voltage (recommended) VS 2.4 40 V VS = (V+), (V-) 6
Input voltage range from (V-) lower -0.2 V Input voltage range from (V-), upper limit (V+) + 0.2 6
Input voltage range upper offset from (V+) 0.2 V (V+) + 0.2 6
Output voltage range from (V-) Open Drain -0.2 40 V Open Drain 6
Ambient temperature TA -40 125 °C 6
Supply voltage (absolute max) VS -0.3 42 V VS = (V+), (V-) 6
Input pins (IN+, IN-) voltage from (V-) -0.3 0.3 V Max is (V+) + 0.3 6
Current into input pins -10 10 mA IN+, IN- 6
Output voltage (open-drain) from (V-) -0.3 42 V Open-drain 6
Output current -10 10 mA 6
Junction temperature TJ 150 °C 6
Storage temperature Tstg -65 150 °C 6
ESD HBM V(ESD) -2000 2000 V Human-body model, per AEC Q100-002 6
ESD CDM V(ESD) -1000 1000 V Charged-device model, per AEC Q100-0111 6
Junction-to-ambient thermal resistance RθJA 203.4 °C/W DBV (SOT-23), 5 pins 7
Junction-to-case (top) thermal resistance RθJC(top) 105.4 °C/W DBV (SOT-23), 5 pins 7
Junction-to-board thermal resistance RθJB 106.6 °C/W DBV (SOT-23), 5 pins 7
Junction-to-top characterization parameter ψJT 54 °C/W DBV (SOT-23), 5 pins 7
Junction-to-board characterization parameter ψJB 106 °C/W DBV (SOT-23), 5 pins 7

CAD (KiCad official)

  • Symbol: TLV1821QDBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tlv1821qdbvrq1-etched.step / tlv1821qdbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv1821qdbvrq1.step / tlv1821qdbvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (69 pp, sha256 7f5bec9789316f62, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF