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TLV1504IPWR

Public Made by Adom

by adom

Texas Instruments Analog To Digital Converters (ADC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TLV1504IPWR

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16

TLV1504IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDO tri_state The 3-state serial output carries the A/D result MSB first and is held high-impedance while CS is high and until the MSB is presented.
2 SDI input Serial data input, MSB (D15) first, whose first four bits are decoded as one of the commands (12 commands on the TLV1504) and is latched on SCLK edges.
3 SCLK input Input serial clock from the host processor that clocks SDI into the input register and may also serve as the source of the conversion clock.
4 EOC/(INT) output Programmed as EOC, it goes low at the end of sampling until conversion is complete and data are ready; programmed as INT, its falling edge indicates data are ready for output.
5 VCC power_in Positive supply voltage; the device operates from a single 2.7-V to 5.5-V power supply.
6 A0 input Analog signal input, internally multiplexed, with a driving source impedance that should be less than or equal to 1 kΩ (use CSTART or long sampling for higher impedance).
7 A1 input Analog signal input, internally multiplexed, with a driving source impedance that should be less than or equal to 1 kΩ (use CSTART or long sampling for higher impedance).
8 A2 input Analog signal input, internally multiplexed, with a driving source impedance that should be less than or equal to 1 kΩ (use CSTART or long sampling for higher impedance).
9 A3 input Analog signal input, internally multiplexed, with a driving source impedance that should be less than or equal to 1 kΩ (use CSTART or long sampling for higher impedance).
10 CSTART input Controls the start of sampling of the selected analog channel, with the rising edge (when CS is high) starting conversion; tie to VCC if not used.
11 GND power_in Ground return for the internal circuitry; all voltage measurements are referenced to GND.
12 PWDN input When held at logic zero, the analog and reference circuits are powered down, and the device restarts via CS, FS, or CSTART after PWDN returns to logic one.
13 FS input DSP frame-sync input that indicates the start of a serial data frame; tie to VCC if not used.
14 REFM input External reference input or internal reference decoupling pin; tie to analog ground if the internal reference is used.
15 REFP input External reference input or internal reference decoupling pin; with an external reference, the maximum input range is the voltage between REFP and REFM, with 10 µF and 0.1 µF shunt capacitors recommended.
16 CS input Chip select; a high-to-low transition resets the internal 4-bit counter, enables SDI, and takes SDO out of 3-state.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: TLV1504IPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tlv1504ipwr-etched.step / tlv1504ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv1504ipwr.step / tlv1504ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 eb04a78ef59d1e3a, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF