component
TLV1117LV33DCYR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
page.json: fold the "Tab" entry into pin 2. On SOT-223-3_TabPin2 the tab is not a separate pad - it is that lead - so n…
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{
"schema": "adom.pads/1",
"slug": "tlv1117lv33dcyr",
"footprint": "SOT-223-3_TabPin2",
"generated_from": {
"footprint": "SOT-223-3_TabPin2@sha256:8ae5f03e2c16377a",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-3.15,
-2.3
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOT-223-3_TabPin2@sha256:8ae5f03e2c16377a"
},
"pad_count": 3,
"symbol_pins": [
"1",
"2",
"3"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-3.15,
-2.3
],
"rot": 0.0,
"size": [
2.0,
1.5
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "GND",
"type": "power_in",
"description": "Ground pin. Device reference return; connect to system ground. Note that the pinout labels this pin as GND for the fixed-voltage TLV1117LV33 (Figure 1/Pin Configurations shows 'ADJ/GND' as the family label because the LV series also covers adjustable variants; for the fixed 3.3-V DCY device this pin is GND).",
"is_pin1": true,
"source": {
"geometry": "SOT-223-3_TabPin2.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-3.15,
0.0
],
"rot": 0.0,
"size": [
2.0,
1.5
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "OUT",
"type": "power_out",
"description": "Regulated 3.3-V output pin. Delivers up to 1 A with 455 mV typical dropout at 1 A. Requires an output capacitor (1.0 µF typical, stable with 0-Ω ESR ceramic). The SOT-223 tab is internally connected to OUT and should be soldered to a copper pour for thermal dissipation. Also the package tab: sOT-223 thermal tab, internally tied to OUT (pin 2). Solder to a copper plane to reduce θJA (62.9 °C/W on high-K JEDEC board) and to carry output current.",
"is_pin1": false,
"source": {
"geometry": "SOT-223-3_TabPin2.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-3.15,
2.3
],
"rot": 0.0,
"size": [
2.0,
1.5
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "IN",
"type": "power_in",
"description": "Unregulated input voltage pin. Operating range 2.0 V to 5.5 V (absolute maximum 6.0 V). Recommended input decoupling per Input and Output Capacitor Requirements in the Application Information section.",
"is_pin1": false,
"source": {
"geometry": "SOT-223-3_TabPin2.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}